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Embb, a generic hardware and software architecture for digital signal processing

RAMSES-2 (Refinement of AADL Models for Synthesis of Embedded Systems) is a model refinement and code generation tool that produces C code for ARINC653, OSEK and POSIX-compliant operating systems. More at https://mem4csd.telecom-paristech.fr/blog/

A simple example design for Zynq-based boards. VHDL design of custom HW mapped in Programmable Logic, Linux - Busybox - Buildroot SW stack, user SW applications interacting with custom hardware, Linux drivers, SW and HW debugging.

Model synchronization between Adele and OSATE with MoTE TGG.

Python implementation of the narrow rivers extraction framework proposed by N.Gasnier, L.Denis, F.Liège, R.Fjørtoft, and F.Tupin in Narrow River Extraction from SAR ImagesUsing Exogenous Information (https://doi.org/10.1109/JSTARS.2021.3083413).