Skip to content
GitLab
Explore
Sign in
Open
3
Merged
378
Closed
129
All
510
Recent searches
Loading
{{ formattedKey }}
{{ title }}
{{ help }}
{{name}}
@{{username}}
None
Any
{{name}}
@{{username}}
None
Any
{{name}}
@{{username}}
None
Any
{{name}}
@{{username}}
{{name}}
@{{username}}
None
Any
Upcoming
Started
{{title}}
None
Any
{{title}}
None
Any
{{title}}
None
Any
{{name}}
Yes
No
Yes
No
{{title}}
{{title}}
{{title}}
Updated date
updates on PLAN code
TTool!394
· created
Feb 09, 2021
by
Maysam Zoor
Merged
updated
Feb 12, 2021
Issue #288 Cross-CPU scheduling
TTool!393
· created
Feb 03, 2021
by
Le Van Truong
Merged
updated
Feb 04, 2021
Add tab to view transactions from core with hardware CPU node
TTool!391
· created
Jan 28, 2021
by
Le Van Truong
Merged
updated
Jan 28, 2021
resolving graph issues
TTool!389
· created
Jan 25, 2021
by
Maysam Zoor
Merged
updated
Jan 26, 2021
Fix AUT graph generation
TTool!390
· created
Jan 26, 2021
by
Le Van Truong
Merged
updated
Jan 26, 2021
Fix Zigbee generated CCode and add runToNextBreakpointMaxTrans
TTool!387
· created
Jan 18, 2021
by
Le Van Truong
Merged
updated
Jan 18, 2021
Remarks update
TTool!385
· created
Jan 14, 2021
by
Maysam Zoor
Merged
updated
Jan 18, 2021
Fix multicore double click and mulicore hanging
TTool!383
· created
Jan 14, 2021
by
Le Van Truong
Merged
Approved
updated
Jan 14, 2021
Un-comment tests and add timeout for the tests
TTool!380
· created
Jan 06, 2021
by
Le Van Truong
Merged
Approved
updated
Jan 07, 2021
add files
TTool!378
· created
Dec 16, 2020
by
Maysam Zoor
Merged
updated
Dec 18, 2020
Revert "Merge branch 'taintBranch' into 'master'"
TTool!376
· created
Dec 16, 2020
by
Ludovic Apvrille
Merged
updated
Dec 16, 2020
Taint branch
TTool!375
· created
Dec 15, 2020
by
Maysam Zoor
Merged
updated
Dec 16, 2020
Draw vertical line for timeline diagram
TTool!373
· created
Dec 10, 2020
by
Le Van Truong
Merged
updated
Dec 10, 2020
Fix memory leak and add test
TTool!371
· created
Nov 26, 2020
by
Le Van Truong
Merged
updated
Nov 26, 2020
Revert "Merge branch 'revert-883077ef' into 'master'"
TTool!370
· created
Nov 26, 2020
by
Ludovic Apvrille
Merged
updated
Nov 26, 2020
Fix memory leak problem
TTool!369
· created
Nov 26, 2020
by
Le Van Truong
Merged
updated
Nov 26, 2020
fix FPGA rescheduling base on Matteo suggestion
TTool!363
· created
Nov 16, 2020
by
Le Van Truong
Merged
updated
Nov 16, 2020
Issue #196 CP (Communication Pattern) not updated when renaming HW nodes
TTool!362
· created
Nov 10, 2020
by
Le Van Truong
Merged
updated
Nov 10, 2020
FPGA rescheduling
TTool!360
· created
Oct 12, 2020
by
Le Van Truong
Merged
updated
Oct 12, 2020
Revert "Merge branch 'revert-883077ef' into 'master'"
TTool!359
· created
Oct 09, 2020
by
Ludovic Apvrille
Merged
updated
Oct 09, 2020
Prev
1
2
3
4
5
6
7
8
9
10
…
19
Next