diff --git a/src/main/java/ddtranslatorSoclib/toTopCell/Loader.java b/src/main/java/ddtranslatorSoclib/toTopCell/Loader.java
index 270e12141aa125a780f1d2f5f5f5fb6471b099de..8debc8bb0aa20d66a0639552e01063a74d5bc1c1 100755
--- a/src/main/java/ddtranslatorSoclib/toTopCell/Loader.java
+++ b/src/main/java/ddtranslatorSoclib/toTopCell/Loader.java
@@ -46,100 +46,109 @@ package ddtranslatorSoclib.toTopCell;
 import avatartranslator.AvatarRelation;//DG 23.06.
 import avatartranslator.AvatarSpecification;//DG 23.06.
 import ddtranslatorSoclib.AvatarChannel;
+import ddtranslatorSoclib.AvatarTTY;
+import ddtranslatorSoclib.*;
 
 public class Loader {
-public static AvatarSpecification avspec;
-	static private String loader;
-	private final static String NAME_CLK = "signal_clk";
+    public static AvatarSpecification avspec;
+    static private String loader;
+    private final static String NAME_CLK = "signal_clk";
 
     private final static String CR = "\n";
-	private final static String CR2 = "\n\n";
+    private final static String CR2 = "\n\n";
 
     public Loader(AvatarSpecification _avspec){
 	
-		avspec =_avspec;
+	avspec =_avspec;
     }
 
-	public static String  getLoader(AvatarSpecification _avspec) {//DG 23.06.
-	    avspec =_avspec;
-	    int nb_clusters=TopCellGenerator.avatardd.getAllCrossbar().size();		
+    public static String  getLoader(AvatarSpecification _avspec) {
+	avspec =_avspec;
+	int nb_clusters=TopCellGenerator.avatardd.getAllCrossbar().size();		
 	   
-		loader = CR2 + "//-------------------------Call Loader---------------------------------" + CR2 ;
-		loader = loader + "std::cerr << \"caba-vgmn-mutekh_kernel_tutorial SoCLib simulator for MutekH\" << std::endl;"
-				+ CR2 ;
+	loader = CR2 + "//-------------------------Call Loader---------------------------------" + CR2 ;
+	loader = loader + "std::cerr << \"caba-vgmn-mutekh_kernel_tutorial SoCLib simulator for MutekH\" << std::endl;"
+	    + CR2 ;
 
-		loader = loader + "if ( (argc < 2) || ((argc % 2) == 0) ) {" + CR ;
+	loader = loader + "if ( (argc < 2) || ((argc % 2) == 0) ) {" + CR ;
 
-		loader = loader + "exit(0);   }" + CR ;
+	loader = loader + "exit(0);   }" + CR ;
 
-		loader = loader + "  argc--;" + CR ;
-		loader = loader + "  argv++;" + CR2 ;
-		loader = loader + "bool heterogeneous = (argc > 2);" + CR2 ;
+	loader = loader + "  argc--;" + CR ;
+	loader = loader + "  argv++;" + CR2 ;
+	loader = loader + "bool heterogeneous = (argc > 2);" + CR2 ;
 
-		loader = loader + "  for (int i = 0; i < (argc - 1); i += 2){" + CR ;	
-		loader = loader + "    char *cpu_p = argv[i];" + CR ;
-		loader = loader + "    const char *kernel_p = argv[i+1];" + CR ;
-		loader = loader + "    const char *arch_str = strsep(&cpu_p, \":\");" + CR ;
-		loader = loader + "    int count = cpu_p ? atoi(cpu_p) : 1;" + CR ;
+	loader = loader + "  for (int i = 0; i < (argc - 1); i += 2){" + CR ;	
+	loader = loader + "    char *cpu_p = argv[i];" + CR ;
+	loader = loader + "    const char *kernel_p = argv[i+1];" + CR ;
+	loader = loader + "    const char *arch_str = strsep(&cpu_p, \":\");" + CR ;
+	loader = loader + "    int count = cpu_p ? atoi(cpu_p) : 1;" + CR ;
 
-		loader = loader + "    common::Loader *text_ldr; " + CR ;
+	loader = loader + "    common::Loader *text_ldr; " + CR ;
 
-		loader = loader + "    if (heterogeneous) {" + CR ;
-		loader = loader + "	 text_ldr = new common::Loader(std::string(kernel_p) + \";.text\");" + CR ;
-		loader = loader + "	 text_ldr->memory_default(0x5a);;" + CR ;
-		loader = loader + "	 data_ldr.load_file(std::string(kernel_p) + \";.rodata;.boot;.excep\");" + CR ;
-		loader = loader + "	 if (i == 0)" + CR ;
-		loader = loader + "	    data_ldr.load_file(std::string(kernel_p) + \";.data;";	
+	loader = loader + "    if (heterogeneous) {" + CR ;
+	loader = loader + "	 text_ldr = new common::Loader(std::string(kernel_p) + \";.text\");" + CR ;
+	loader = loader + "	 text_ldr->memory_default(0x5a);;" + CR ;
+	loader = loader + "	 data_ldr.load_file(std::string(kernel_p) + \";.rodata;.boot;.excep\");" + CR ;
+	loader = loader + "	 if (i == 0)" + CR ;
+	loader = loader + "	    data_ldr.load_file(std::string(kernel_p) + \";.data;";	
 	
-		int j=0;
+	int j=0;
 	
-		int i=0;
+	int i=0;
 	
 
-		for(AvatarRelation ar: avspec.getRelations()) {
+	for(AvatarRelation ar: avspec.getRelations()) {
 
-       		for(i=0; i<ar.nbOfSignals() ; i++) {
+	    for(i=0; i<ar.nbOfSignals() ; i++) {
 
-			loader = loader + ".channel" + j + ";";
-			j++;
-		}
-}
-		// We resume the generation of the fixed code
-		loader = loader + ".cpudata;.contextdata\");" + CR ;
-		loader = loader + "      } else {" + CR ;
-		loader = loader + "	  text_ldr = new common::Loader(std::string(kernel_p));" + CR ;
-		loader = loader + "	  text_ldr->memory_default(0x5a);" + CR ;
-		loader = loader + "	  data_ldr.load_file(std::string(kernel_p));" + CR ;
-		loader = loader + "      }" + CR2 ;
-
-		loader = loader + "      common::Loader tools_ldr(kernel_p);" + CR ;
-		loader = loader + "     tools_ldr.memory_default(0x5a);" + CR2 ;
-
-		loader = loader + "      for (int j = 0; j < count; j++) {" + CR ;
-		loader = loader + "	int id = cpus.size();" + CR ;
-		loader = loader + "	std::cerr << \"***\" << cpus.size() << std::endl;" + CR ;
-
-		loader = loader + "	CpuEntry *e = newCpuEntry(arch_str, id, text_ldr);" + CR ;
-
-		loader = loader + "	if (j == 0)" + CR ;
-		loader = loader + "	  e->init_tools(tools_ldr);" + CR ;
-
-		loader = loader + "	e->cpu = e->new_cpu(e);" + CR ;
-		loader = loader + "	cpus.push_back(e);" + CR ;
-		loader = loader + "      }" + CR ;
-		loader = loader + "    }" + CR2 ;
-		int nb_tty =1; 
-
-if(nb_clusters==0){
-    loader = loader + "  const size_t xicu_n_irq = "+(1+nb_tty+3+1)+";" + CR2 ;
-}else{
-    loader = loader + "  const size_t xicu_n_irq = "+(1+nb_tty+3+1)+";" + CR2 ;//DG ToDo
-}
-
-        return loader;
+		loader = loader + ".channel" + j + ";";
+		j++;
+	    }
 	}
+	// We resume the generation of the fixed code
+	loader = loader + ".cpudata;.contextdata\");" + CR ;
+	loader = loader + "      } else {" + CR ;
+	loader = loader + "	  text_ldr = new common::Loader(std::string(kernel_p));" + CR ;
+	loader = loader + "	  text_ldr->memory_default(0x5a);" + CR ;
+	loader = loader + "	  data_ldr.load_file(std::string(kernel_p));" + CR ;
+	loader = loader + "      }" + CR2 ;
+
+	loader = loader + "      common::Loader tools_ldr(kernel_p);" + CR ;
+	loader = loader + "     tools_ldr.memory_default(0x5a);" + CR2 ;
+
+	loader = loader + "      for (int j = 0; j < count; j++) {" + CR ;
+	loader = loader + "	int id = cpus.size();" + CR ;
+	loader = loader + "	std::cerr << \"***\" << cpus.size() << std::endl;" + CR ;
+
+	loader = loader + "	CpuEntry *e = newCpuEntry(arch_str, id, text_ldr);" + CR ;
+
+	loader = loader + "	if (j == 0)" + CR ;
+	loader = loader + "	  e->init_tools(tools_ldr);" + CR ;
+
+	loader = loader + "	e->cpu = e->new_cpu(e);" + CR ;
+	loader = loader + "	cpus.push_back(e);" + CR ;
+	loader = loader + "      }" + CR ;
+	loader = loader + "    }" + CR2 ;
+		
+	int nb_tty=0;
+
+		
+	/* Need to generate one interrupt per TTy and one for the DMA*/
+	if(nb_clusters==0){
+		  
+	    nb_tty=TopCellGenerator.avatardd.getAllTTY().size();
+	    loader = loader + "  const size_t xicu_n_irq = "+(1+nb_tty+3+1)+";" + CR2 ;
+	}else{
+	
+	    nb_tty= nb_clusters;//provisional
+	    loader = loader + "  const size_t xicu_n_irq = "+(1+nb_tty+3+1)+";" + CR2 ;
+	}
+
+	return loader;
+    }
 
     String getNAME_CLK(){
-      return NAME_CLK;
+	return NAME_CLK;
     }
 }
diff --git a/src/main/java/ddtranslatorSoclib/toTopCell/MappingTable.java b/src/main/java/ddtranslatorSoclib/toTopCell/MappingTable.java
index e1999b96c7e9b6ea03288a78453766f3a254df85..6b0a5dcdedada50b631c6ab08d67373d43bc9184 100755
--- a/src/main/java/ddtranslatorSoclib/toTopCell/MappingTable.java
+++ b/src/main/java/ddtranslatorSoclib/toTopCell/MappingTable.java
@@ -92,6 +92,8 @@ public class MappingTable {
   
 	int nb_clusters=TopCellGenerator.avatardd.getAllCrossbar().size();
 	int nb_rams=TopCellGenerator.avatardd.getAllRAM().size();
+	int nb_ttys=TopCellGenerator.avatardd.getAllTTY().size();
+	int nb_hwa=TopCellGenerator.avatardd.getAllCoproMWMR().size();
 	avatardd = dd;
     
 	if(nb_clusters == 0){
@@ -133,14 +135,14 @@ public class MappingTable {
 	    mapping += "maptab.add(Segment(\"data\", 0x7f000000, 0x01000000, IntTab(2), false)); " + CR2;
 
 	    mapping = mapping + "maptab.add(Segment(\"simhelper\", 0xd3200000, 0x00000100, IntTab(3), false));" + CR;	    
-	    mapping = mapping + "maptab.add(Segment(\"vci_rttimer\", 0xd6000000, 0x00000100, IntTab(4), false));" + CR2;
+	    mapping = mapping + "maptab.add(Segment(\"vci_rttimer\", 0xd6200000, 0x00000100, IntTab(4), false));" + CR2;
 	    mapping = mapping + " maptab.add(Segment(\"vci_xicu\", 0xd2200000, 0x00001000, IntTab(5), false));" + CR;
-	    mapping = mapping + "maptab.add(Segment(\"vci_dma\", 0xf0000000, 0x00001000, IntTab(6), false));" + CR2;
-
-	    mapping = mapping + "maptab.add(Segment(\"vci_fdt_rom\", 0xe0000000, 0x00001000, IntTab(7), false));" + CR2;
+	    // mapping = mapping + "maptab.add(Segment(\"vci_dma\", 0xf2000000, 0x00001000, IntTab(6), false));" + CR2;
+	    mapping = mapping + "maptab.add(Segment(\"vci_dma\", 0xf0200000, 0x00001000, IntTab(6), false));" + CR2;
+	    mapping = mapping + "maptab.add(Segment(\"vci_fdt_rom\", 0xe0200000, 0x00001000, IntTab(7), false));" + CR2;
 	    
 	    mapping = mapping + "maptab.add(Segment(\"vci_fd_access\", 0xd4200000, 0x00000100, IntTab(8), false));" + CR;
-	    mapping = mapping + "maptab.add(Segment(\"vci_ethernet\",  0xd5000000, 0x00000020, IntTab(9), false));" + CR;
+	    mapping = mapping + "maptab.add(Segment(\"vci_ethernet\",  0xd5200000, 0x00000020, IntTab(9), false));" + CR;
 	    mapping = mapping + "maptab.add(Segment(\"vci_block_device\", 0xd1200000, 0x00000020, IntTab(10), false));" + CR2;   
     
 	    int address_start = 268435456;
@@ -187,33 +189,39 @@ public class MappingTable {
 		}
 	    }
 	
-	    j=0;
+	    int tty_count=0;   
 	    for (AvatarTTY tty : TopCellGenerator.avatardd.getAllTTY()) {
 	 
-		tty.setNo_target(10+nb_rams+j);  //count only addtional RAMs     
+		tty.setNo_target(10+nb_rams+tty_count);  //count only addtional RAMs     
 		/* attention this will not work for more than 16 TTYs */
-		mapping += "maptab.add(Segment(\"vci_multi_tty"+j+"\" , 0xa"+(tty.getNo_tty()+1)+"200000, 0x00000010, IntTab(" +(tty.getNo_target()) +"), false));" + CR;
-		j++; 
+		/* TTY0 = console has a fixed address */
+
+		if (tty.getNo_tty()==0){
+		    mapping += "maptab.add(Segment(\"vci_multi_tty"+tty.getNo_tty()+"\" , 0xd"+(tty.getNo_tty())+"200000, 0x00000010, IntTab(" +(tty.getNo_target()) +"), false));" + CR;
+		    }
+		else{
+		    String adr_tty = Integer.toHexString(tty.getNo_tty()-1);
+		    mapping += "maptab.add(Segment(\"vci_multi_tty"+tty.getNo_tty()+"\" , 0xa"+adr_tty+"200000, 0x00000010, IntTab(" +(tty.getNo_target()) +"), false));" + CR;
+		}
+		tty_count++;
 	    }	    
 
 	    /* Instantiation of the MWMR wrappers for hardware accellerators */
 	    /* The accelerators themselves are specifies on DIPLODOCUS level */
-      
-	    int count = 7+nb_rams+1;
-	    int hwa_count=0;
-	    int nb_hwa=0;
+
+	    /* There are 10 segments but 3 of them, 0, 1, 2 belong to the boot RAM */
+		int segment_count = (10-3)+(nb_rams-1)+nb_ttys;
+	    int hwa_count=0;	    
 	    int MWMR_SIZE=4096;
 	    int MWMRd_SIZE=12288;
      
-	    i=0;
-	    for (AvatarCoproMWMR MWMRwrapper : TopCellGenerator.avatardd.getAllCoproMWMR()) {nb_hwa++;
-	    }
-      
+	    // i=0;
+	   
 	    for (AvatarCoproMWMR MWMRwrapper : TopCellGenerator.avatardd.getAllCoproMWMR()) {   
-		mapping += "maptab.add(Segment(\"mwmr_ram"+hwa_count+"\", 0xA0"+  Integer.toHexString(2097152+MWMR_SIZE*i)+",  0x00001000, IntTab("+count+"), false));" + CR; 
-		mapping += "maptab.add(Segment(\"mwmrd_ram"+hwa_count+"\", 0x20"+  Integer.toHexString(2097152+MWMRd_SIZE*i)+",  0x00003000, IntTab("+(count+nb_hwa)+"), false));" + CR; 	 
+		mapping += "maptab.add(Segment(\"mwmr_ram"+hwa_count+"\", 0xA0"+  Integer.toHexString(2097152+MWMR_SIZE*i)+",  0x00001000, IntTab("+segment_count+"), false));" + CR; 
+		mapping += "maptab.add(Segment(\"mwmrd_ram"+hwa_count+"\", 0x20"+  Integer.toHexString(2097152+MWMRd_SIZE*i)+",  0x00003000, IntTab("+(segment_count+nb_hwa)+"), false));" + CR; 	 
 		hwa_count++;
-		count+=1;
+		segment_count++;
 	    } 
 	    hwa_count=0;  
 
@@ -284,9 +292,8 @@ public class MappingTable {
 		mapping += "maptab.add(Segment(\"uram" + ram.getNo_ram() + "\",  0x"+Integer.toHexString(SEG_RAM_BASE + ram.getClusterIndex()*CLUSTER_SIZE+cacheability_bit)+",  0x"+Integer.toHexString(ram.getDataSize()/2)+", IntTab("+ram.getClusterIndex()+","+(ram.getNo_target())+"), false));" + CR;	  
 	    }                     
          
-	    //Identify the TTYS on this cluster (not TTYs in total)
-	    //Currently one tty per cluster
- 
+	    //Identify the TTYS in current cluster (as opposed to TTYs in total)
+	   
 	    for (AvatarTTY tty : TopCellGenerator.avatardd.getAllTTY()) {	   
 		/* the number of fixed targets varies depending on if on cluster 0 or other clusters */
 		
diff --git a/src/main/java/ddtranslatorSoclib/toTopCell/NetList.java b/src/main/java/ddtranslatorSoclib/toTopCell/NetList.java
index 9fcae6bfee65a1cbc7b57f51495f5708baa59aaa..490d74414a9fc157434da61ab336f9fd553c4afd 100755
--- a/src/main/java/ddtranslatorSoclib/toTopCell/NetList.java
+++ b/src/main/java/ddtranslatorSoclib/toTopCell/NetList.java
@@ -532,8 +532,11 @@ public class NetList
 
 	netlist = netlist + "// TTY netlist" + CR2;
 	i=0;
+	int no_irq_tty = 0; //first TTY has interrupt number 0
 	for (AvatarTTY tty:TopCellGenerator.avatardd.getAllTTY ())
 	    {
+		if (no_irq_tty == 1){no_irq_tty+=5;}//all other TTYs have higher interrupt numbers; provisional; will later have to count DMAs if several; take into account clusters with one DMA each
+	
 		netlist =
 		    netlist + tty.getTTYName () + ".p_clk(signal_clk);" + CR;
 		netlist =
@@ -542,7 +545,7 @@ public class NetList
 		netlist =
 		    netlist + tty.getTTYName () + ".p_vci(signal_vci_tty" + i +
 		    ");" + CR2;
-		int no_irq_tty = 0;
+		
 		if (nb_clusters == 0)
 		    {
 
@@ -599,7 +602,7 @@ public class NetList
 		    }
 		i++;
 		//One ICU per cluster per default
-		no_irq_tty += 6;	//if there is more than one tty, irq >5
+		no_irq_tty ++;	//if there is more than one tty, irq >5
 	    }
 
 	//////////////// DMA access