From 4dcbfb26d5fc00ec7109a046feb5bee9059da282 Mon Sep 17 00:00:00 2001
From: Le Van Truong <le.truong@telecom-paris.fr>
Date: Thu, 24 Sep 2020 18:59:03 +0200
Subject: [PATCH] fix core dump
---
.../src_simulator/arch/ReconfigScheduler.cpp | 37 ++++++++++++++-----
1 file changed, 27 insertions(+), 10 deletions(-)
diff --git a/simulators/c++2/src_simulator/arch/ReconfigScheduler.cpp b/simulators/c++2/src_simulator/arch/ReconfigScheduler.cpp
index 6f17bf89ec..3b32f0a52a 100644
--- a/simulators/c++2/src_simulator/arch/ReconfigScheduler.cpp
+++ b/simulators/c++2/src_simulator/arch/ReconfigScheduler.cpp
@@ -46,6 +46,7 @@ ReconfigScheduler::ReconfigScheduler(const std::string& iName, Priority iPrio, c
ReconfigScheduler::ReconfigScheduler(const std::string& iName, Priority iPrio, WorkloadSource** aSourceArray, unsigned int iNbOfSources, const std::string iTaskOrder): WorkloadSource(iPrio, aSourceArray, iNbOfSources), _name(iName), _taskOrder(iTaskOrder), _nextTransaction(0), _lastSource(0), _tempWorkloadList(0), _indexMark(0), _reconfigNumber(0) {
}
Priority currentRank = 0;
+Priority minRank = 0;
TMLTime ReconfigScheduler::schedule(TMLTime iEndSchedule){
std::cout<<"reconfig scheduler"<<std::endl;
TaskList::iterator i;
@@ -103,6 +104,17 @@ TMLTime ReconfigScheduler::schedule(TMLTime iEndSchedule){
Priority aHighestPrioPast=-1;
bool isFirstRankSelected = false;
for(WorkloadList::iterator i = _workloadList.begin(); i != _workloadList.end(); ++i){
+ for(WorkloadList::iterator j = _workloadList.begin(); j != _workloadList.end(); ++j){
+ aTempTrans = (*j)->getNextTransaction(iEndSchedule);
+ if(aTempTrans != 0) {
+ if(!isFirstRankSelected) {
+ minRank = (*j)->getPriority(); //min(minRank, (*j)->getPriority());
+ isFirstRankSelected = true;
+ } else {
+ minRank = min(minRank, (*j)->getPriority());
+ }
+ }
+ }
#ifdef DEBUG_FPGA
std::cout<<"schedule for"<<std::endl;
#endif
@@ -110,7 +122,7 @@ TMLTime ReconfigScheduler::schedule(TMLTime iEndSchedule){
aTempTrans=(*i)->getNextTransaction(iEndSchedule);
if(aTempTrans==0) std::cout<< (*i)->toString() + "temp trans is 0"<<std::endl;
else {
- std::cout<<(*i)->toString() + " hellboy temp trans is "<<iEndSchedule<<", rank = "<<(*i)->getPriority()<< ",Runable "<< aTempTrans->getRunnableTime()<< ",virtual "<< aTempTrans->getVirtualLength()<<std::endl;
+ std::cout<<(*i)->toString() + "temp trans is "<<aTempTrans->toShortString()<<std::endl;
currentRank = (*i)->getPriority();
}
#ifdef DEBUG_FPGA
@@ -120,27 +132,32 @@ TMLTime ReconfigScheduler::schedule(TMLTime iEndSchedule){
if (aTempTrans!=0 && aTempTrans->getVirtualLength()!=0){
aRunnableTime=aTempTrans->getRunnableTime();
- std::cout << "-----------hellboy_FUTURE: Runable time: " << aRunnableTime << ", " << aTempTrans->getCommand()->getTask()->toString() << std::endl;
- if ((*i)->getPriority()<aHighestPrioPast || ((*i)->getPriority()==aHighestPrioPast && aRunnableTime<aLowestRunnableTimePast)){
- aHighestPrioPast=(*i)->getPriority();
- aLowestRunnableTimePast=aRunnableTime;
- aMarkerPast=aTempTrans;
- aSourcePast=*i;
- }
+
+ //Past
+ if ((*i)->getPriority()<aHighestPrioPast || ((*i)->getPriority()==aHighestPrioPast && aRunnableTime<aLowestRunnableTimePast)){
+ aHighestPrioPast=(*i)->getPriority();
+ aLowestRunnableTimePast=aRunnableTime;
+ aMarkerPast=aTempTrans;
+ aSourcePast=*i;
+ }
+
#ifdef DEBUG_FPGA
std::cout<<"erase"<<std::endl;
#endif
}
}
- if (aMarkerPast!=0){
+ if (aMarkerPast==0){
+ _nextTransaction=(aSourceFuture==0)? 0 : aSourceFuture->getNextTransaction(iEndSchedule);;
+ _lastSource=aSourceFuture; //NEW
+ }else{
_nextTransaction=aSourcePast->getNextTransaction(iEndSchedule);;
_lastSource=aSourcePast; //NEW
- _reconfigNumber = aSourcePast->getPriority();
}
#ifdef DEBUG_FPGA
std::cout<<"end order scheduler"<<std::endl;
#endif
+ _reconfigNumber = minRank;
return _reconfigNumber;
}
--
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