From 548d52364a69241e41f5da73a1ff5989463b91b9 Mon Sep 17 00:00:00 2001
From: "Come Demarigny [l3]" <demarigny@debussy.soc.lip6.fr>
Date: Fri, 16 Jun 2017 17:22:55 +0200
Subject: [PATCH] Modification generation ldscript

---
 MPSoC/Makefile.forsoclib                      |   1 +
 MPSoC/mutekh/arch/soclib/ldscript.cpp         |   7 +
 .../toSoclib/TasksAndMainGenerator.java       |  68 ++++--
 .../toTopCell/Deployinfo.java                 | 199 +++++++++---------
 .../toTopCell/TopCellGenerator.java           | 116 +++++-----
 ...ialogAvatarddExecutableCodeGeneration.java |   5 +-
 6 files changed, 223 insertions(+), 173 deletions(-)

diff --git a/MPSoC/Makefile.forsoclib b/MPSoC/Makefile.forsoclib
index e8efda1010..4ffd9ab220 100755
--- a/MPSoC/Makefile.forsoclib
+++ b/MPSoC/Makefile.forsoclib
@@ -30,6 +30,7 @@ compilesoclib:
 	cp generated_topcell/top.cc  soclib/soclib/platform/topcells/caba-vgmn-mutekh_kernel_tutorial/
 	cp generated_topcell/deployinfo.h  mutekh/arch/soclib/
 	cp generated_topcell/deployinfo_map.h  mutekh/arch/soclib/
+	cp generated_topcell/deployinfo_ram.h  mutekh/arch/soclib/
 	cp generated_topcell/platform_desc  soclib/soclib/platform/topcells/caba-vgmn-mutekh_kernel_tutorial/platform_desc
 	cat generated_topcell/config_noproc generated_topcell/nbproc > generated_topcell/config 
 	cp generated_topcell/config  mutekh/examples/avatar/
diff --git a/MPSoC/mutekh/arch/soclib/ldscript.cpp b/MPSoC/mutekh/arch/soclib/ldscript.cpp
index 780572d627..3f826cd44b 100644
--- a/MPSoC/mutekh/arch/soclib/ldscript.cpp
+++ b/MPSoC/mutekh/arch/soclib/ldscript.cpp
@@ -78,7 +78,13 @@ MEMORY
 //mwmrd_ram (RWAL): ORIGIN = 0xB0200000, LENGTH = 0x00003000
 //19.05. une seule RAMLOCKS en cas de besoin (actually unused)
 vci_locks (RWAL): ORIGIN = 0xC0200000, LENGTH = 0x100
+
+//ajout CD
+
+#include <arch/soclib/deployinfo_ram.h>
+
 //ajoute DG
+/*
 #if defined(DEPLOY_RAM0_NAME)
     DEPLOY_RAM0_NAME (RWAL): ORIGIN = DEPLOY_RAM0_ADDR, LENGTH = DEPLOY_RAM0_SIZE
 #endif
@@ -238,6 +244,7 @@ vci_locks (RWAL): ORIGIN = 0xC0200000, LENGTH = 0x100
 #if defined(CACHED_RAM29_NAME)
     CACHED_RAM29_NAME (RWAL): ORIGIN = CACHED_RAM29_ADDR, LENGTH = CACHED_RAM29_SIZE
 #endif
+*/
 //fin ajoute DG
 }
 
diff --git a/src/main/java/ddtranslatorSoclib/toSoclib/TasksAndMainGenerator.java b/src/main/java/ddtranslatorSoclib/toSoclib/TasksAndMainGenerator.java
index 3a761c5d16..e17f493717 100755
--- a/src/main/java/ddtranslatorSoclib/toSoclib/TasksAndMainGenerator.java
+++ b/src/main/java/ddtranslatorSoclib/toSoclib/TasksAndMainGenerator.java
@@ -1295,24 +1295,62 @@ public class TasksAndMainGenerator {
 
         return ret;
     }
-  public static String getDeployInfoRam() {
+
+    //Ajout CD 16.6
+    //Les deux méthodes suivantes on été déplacé de /toTopCell/Deployinfo.java pour éviter un bug causé par AvatarRelation et AvatarSpecification.
+    //Lors de la première génération de code, une erreur peut être affichée mais la génération de code fonctionne correctement. l'erreur ne s'affiche plus par la suite.
+
+    public static String getDeployInfoRam() {
         int i=0;
-    int j;
-    String deployinfo_ram = CR;
-    try{
-    for(AvatarRelation ar: avspec.getRelations()){
-        for (j=0; j<ar.nbOfSignals();j++){
-        deployinfo_ram += "DEPLOY_RAM" + i + "_NAME (RWAL) : ORIGIN = DEPLOY_RAM" + i + "_ADDR, LENGTH = DEPLOY_RAM" + i + "_SIZE" + CR;
-        deployinfo_ram += "CACHED_RAM" + i + "_NAME (RWAL) : ORIGIN = CACHED_RAM" + i + "_ADDR, LENGTH = CACHED_RAM" + i + "_SIZE" + CR;
-        i++;
-        }
-    }
-    }catch (Exception e){
-        e.printStackTrace();
+	int j;
+	String deployinfo_ram = CR;
+	try{
+	    for(AvatarRelation ar: avspec.getRelations()){
+		for (j=0; j<ar.nbOfSignals();j++){
+		    deployinfo_ram += "DEPLOY_RAM" + i + "_NAME (RWAL) : ORIGIN = DEPLOY_RAM" + i + "_ADDR, LENGTH = DEPLOY_RAM" + i + "_SIZE" + CR;
+		    deployinfo_ram += "CACHED_RAM" + i + "_NAME (RWAL) : ORIGIN = CACHED_RAM" + i + "_ADDR, LENGTH = CACHED_RAM" + i + "_SIZE" + CR;
+		    i++;
+		}
     }
-    return deployinfo_ram;
+	}catch (Exception e){
+	    e.printStackTrace();
+	}
+	return deployinfo_ram;
     }
 
-
+    public static String getDeployInfoMap() {
+	int i=0;       
+        String deployinfo_map = CR;
+	int j;
+	
+	deployinfo_map += "#define MAP_A\\" + CR;
+	try{		
+	    for (AvatarRAM ram : TopCellGenerator.avatardd.getAllRAM()) {
+		if (!(ram.getChannels().isEmpty())){
+		    for(AvatarRelation ar: avspec.getRelations()){
+			for (j=0;j<ar.nbOfSignals();j++) {
+			    deployinfo_map = deployinfo_map + "\n .channel"+i+" : { \\" + CR;
+			    deployinfo_map = deployinfo_map + "*(section_channel"+i+ ")\\"+ CR;	
+			deployinfo_map = deployinfo_map + "} > uram"+ram.getNo_ram()+"\\"+ CR;	
+			i++;
+			}
+		    }
+		    i=0;
+		    for(AvatarRelation ar: avspec.getRelations()){  //CD 15.06 dynamic to signal number
+			for (j=0;j<ar.nbOfSignals();j++) {
+			    deployinfo_map = deployinfo_map + "\n .lock"+i+" : { \\" + CR;
+			    deployinfo_map = deployinfo_map + "*(section_lock"+i+ ")\\"+ CR;		   
+			deployinfo_map = deployinfo_map + "} > uram0\\"+ CR;//DG 27.06. no ramlocks
+			i++;
+			}
+		    }
+		}	    
+	    }
+	}catch (Exception e){
+	    e.printStackTrace();
+	}
+	return deployinfo_map;	
+	}
+    //fin ajout CD
 
 }
diff --git a/src/main/java/ddtranslatorSoclib/toTopCell/Deployinfo.java b/src/main/java/ddtranslatorSoclib/toTopCell/Deployinfo.java
index 156567d00f..6b5267246c 100755
--- a/src/main/java/ddtranslatorSoclib/toTopCell/Deployinfo.java
+++ b/src/main/java/ddtranslatorSoclib/toTopCell/Deployinfo.java
@@ -1,46 +1,45 @@
-/* Copyright or (C) or Copr. GET / ENST, Telecom-Paris, Ludovic Apvrille
- * Daniela Genius, Lip6, UMR 7606 
- * 
- * ludovic.apvrille AT enst.fr
- * daniela.genius@lip6.fr
- * 
- * This software is a computer program whose purpose is to allow the
- * edition of TURTLE analysis, design and deployment diagrams, to
- * allow the generation of RT-LOTOS or Java code from this diagram,
- * and at last to allow the analysis of formal validation traces
- * obtained from external tools, e.g. RTL from LAAS-CNRS and CADP
- * from INRIA Rhone-Alpes.
- * 
- * This software is governed by the CeCILL  license under French law and
- * abiding by the rules of distribution of free software.  You can  use,
- * modify and/ or redistribute the software under the terms of the CeCILL
- * license as circulated by CEA, CNRS and INRIA at the following URL
- * "http://www.cecill.info".
- * 
- * As a counterpart to the access to the source code and  rights to copy,
- * modify and redistribute granted by the license, users are provided only
- * with a limited warranty  and the software's author,  the holder of the
- * economic rights,  and the successive licensors  have only  limited
- * liability.
- * 
- * In this respect, the user's attention is drawn to the risks associated
- * with loading,  using,  modifying and/or developing or reproducing the
- * software by the user in light of its specific status of free software,
- * that may mean  that it is complicated to manipulate,  and  that  also
- * therefore means  that it is reserved for developers  and  experienced
- * professionals having in-depth computer knowledge. Users are therefore
- * encouraged to load and test the software's suitability as regards their
- * requirements in conditions enabling the security of their systems and/or
- * data to be ensured and,  more generally, to use and operate it in the
- * same conditions as regards security.
- * 
- * The fact that you are presently reading this means that you have had
- * knowledge of the CeCILL license and that you accept its terms.
- */
-
-
 
 
+/**Copyright or (C) or Copr. GET / ENST, Telecom-Paris, Ludovic Apvrille
+  Daniela Genius, Lip6, UMR 7606 
+
+  ludovic.apvrille AT enst.fr
+  daniela.genius@lip6.fr
+
+  This software is a computer program whose purpose is to allow the 
+  edition of TURTLE analysis, design and deployment diagrams, to 
+  allow the generation of RT-LOTOS or Java code from this diagram, 
+  and at last to allow the analysis of formal validation traces 
+  obtained from external tools, e.g. RTL from LAAS-CNRS and CADP 
+  from INRIA Rhone-Alpes.
+
+  This software is governed by the CeCILL  license under French law and
+  abiding by the rules of distribution of free software.  You can  use, 
+  modify and/ or redistribute the software under the terms of the CeCILL
+  license as circulated by CEA, CNRS and INRIA at the following URL
+  "http://www.cecill.info". 
+
+  As a counterpart to the access to the source code and  rights to copy,
+  modify and redistribute granted by the license, users are provided only
+  with a limited warranty  and the software's author,  the holder of the
+  economic rights,  and the successive licensors  have only  limited
+  liability. 
+
+  In this respect, the user's attention is drawn to the risks associated
+  with loading,  using,  modifying and/or developing or reproducing the
+  software by the user in light of its specific status of free software,
+  that may mean  that it is complicated to manipulate,  and  that  also
+  therefore means  that it is reserved for developers  and  experienced
+  professionals having in-depth computer knowledge. Users are therefore
+  encouraged to load and test the software's suitability as regards their
+  requirements in conditions enabling the security of their systems and/or 
+  data to be ensured and,  more generally, to use and operate it in the 
+  same conditions as regards security. 
+
+  The fact that you are presently reading this means that you have had
+  knowledge of the CeCILL license and that you accept its terms.
+*/
+
 /* This class generates the deployment info for the ldscript*/
 
 
@@ -83,12 +82,12 @@ package ddtranslatorSoclib.toTopCell;
 import ddtranslatorSoclib.*;
 import ddtranslatorSoclib.toSoclib.*;
 
-//add
+//added
 import avatartranslator.*;
-import ddtranslatorSoclib.AvatarRAM;
-import ddtranslatorSoclib.AvatarTask;
-import ddtranslatorSoclib.AvatarddSpecification;
-import ddtranslatorSoclib.toTopCell.TopCellGenerator;
+//import ddtranslatorSoclib.AvatarRAM;
+//import ddtranslatorSoclib.AvatarTask;
+//import ddtranslatorSoclib.AvatarddSpecification;
+//import ddtranslatorSoclib.toTopCell.TopCellGenerator;
 import myutil.Conversion;
 import myutil.FileException;
 import myutil.FileUtils;
@@ -105,9 +104,9 @@ public class Deployinfo {
     private final static String CR = "\n";
     private final static String CR2 = "\n\n";
   
-    public static AvatarRelation ar;
+    //public static AvatarRelation ar;
     public static AvatarSpecification avspec;//DG 15.05.2017    
-    //add
+    //added
     public static AvatarddSpecification avddspec;
     private Vector<?> warnings;
 
@@ -238,57 +237,65 @@ System.out.println("@@@@@@@@   @@@@@@@@@@@@@@@@@");
 	return deployinfo_map;	
 	}*/
 
-    public static String getDeployInfoMap() {
-	int i=0;       
-        String deployinfo_map = CR;
-
-	deployinfo_map += "#define MAP_A\\" + CR;		
-	for (AvatarRAM ram : TopCellGenerator.avatardd.getAllRAM()) {
-	    if (!(ram.getChannels().isEmpty())){	
-		//for (AvatarChannel channel : ram.getChannels()) {
-		for (i=0;i<30;i++) {
-		    deployinfo_map = deployinfo_map +"\n .channel"+i+" : { \\" + CR;
-		    deployinfo_map = deployinfo_map + "*(section_channel"+i+ ")\\"+ CR;
-		   
-		    deployinfo_map=deployinfo_map+ "} > uram"+ram.getNo_ram()+"\\"+ CR;	
-		    //i++;
-		}
+    // public static String getDeployInfoMap() {
+    // 	int i=0;       
+    //     String deployinfo_map = CR;
+
+    // 	deployinfo_map += "#define MAP_A\\" + CR;
+    // 	try{		
+    // 	for (AvatarRAM ram : TopCellGenerator.avatardd.getAllRAM()) {
+    // 	    if (!(ram.getChannels().isEmpty())){	
+    // 		    for (i=0;i<30;i++) {
+    // 			deployinfo_map = deployinfo_map +"\n .channel"+i+" : { \\" + CR;
+    // 			deployinfo_map = deployinfo_map + "*(section_channel"+i+ ")\\"+ CR;
+			
+    // 			deployinfo_map=deployinfo_map+ "} > uram"+ram.getNo_ram()+"\\"+ CR;	
+    // 			//i++;
+    // 		    }
 		
-		i=0;
-		//for (AvatarChannel channel : ram.getChannels()) {
-		for (i=0;i<30;i++) {
-		    deployinfo_map = deployinfo_map +"\n .lock"+i+" : { \\" + CR;
-		    deployinfo_map = deployinfo_map + "*(section_lock"+i+ ")\\"+ CR;		   
-		    //  if(use_vcilocks) deployinfo_map=deployinfo_map+ "} > vci_locks\\"+ CR;
-		    deployinfo_map=deployinfo_map+ "} > uram0\\"+ CR;//DG 27.06. no ramlocks
-		    //i++;
-		}
-
-	    }	    
-	}
-	return deployinfo_map;	
-	}
-
+    // 		    i=0;
+    // 		    //for (AvatarChannel channel : ram.getChannels()) {
+    // 		    for (i=0;i<30;i++) {
+    // 			deployinfo_map = deployinfo_map +"\n .lock"+i+" : { \\" + CR;
+    // 			deployinfo_map = deployinfo_map + "*(section_lock"+i+ ")\\"+ CR;		   
+    // 			//  if(use_vcilocks) deployinfo_map=deployinfo_map+ "} > vci_locks\\"+ CR;
+    // 			deployinfo_map=deployinfo_map+ "} > uram0\\"+ CR;//DG 27.06. no ramlocks
+    // 			//i++;
+    // 		    }
+    // 	    }	    
+    // 	}
+    // 	}catch (Exception e){
+    // 	    e.printStackTrace();
+    // 	}
+    // 	return deployinfo_map;	
+    // 	}
+    //Déplacé dans TasksAndMainGenerator
 
     //ajout C.D.
-    /*    public static String getDeployInfoRam() {
-        int i=0;
-	String deployinfo_ram = CR;
-	//List<AvatarRelation> ar= avspec.getRelations();
-	//	int k = ar.nbOfSignals();
-       	//if(ar !=null){
-	//for (AvatarRAM ram : TopCellGenerator.avatardd.getAllRAM()) { 
-	for(AvatarRelation ar: avspec.getRelations()){
-	System.out.println("test test test");
-	for (i=0; i<ar.nbOfSignals();i++){
-	    deployinfo_ram += "DEPLOY_RAM" + i + "_NAME (RWAL) : ORIGIN = DEPLOY_RAM" + i + "_ADDR, LENGTH = DEPLOY_RAM" + i + "_SIZE" + CR;
-	    deployinfo_ram += "CACHED_RAM" + i + "_NAME (RWAL : ORIGIN = CACHED_RAM" + i + "_ADDR, LENGTH = CACHED_RAM" + i + "_SIZE" + CR;
-		    //     	}
-		      }
-	}
-	//}
-	return deployinfo_ram;
-	}*/
+    // public static String getDeployInfoRam() {
+    //     int i=0;
+    // 	String deployinfo_ram = CR;
+    // 	int k=3;
+    // 	if(avspec.getRelations()== null){
+    // 	    System.out.println("avspec est null");
+    // 	}
+    // 	//int k=lar.size();
+    // 	//int k = lar.nbOfSignals();
+    //    	//if(ar !=null){
+    // 	try{
+    // 	for(AvatarRelation ar: avspec.getRelations()){
+    // 	    for (i=0; i<k;i++){
+    // 		deployinfo_ram += "DEPLOY_RAM" + i + "_NAME (RWAL) : ORIGIN = DEPLOY_RAM" + i + "_ADDR, LENGTH = DEPLOY_RAM" + i + "_SIZE" + CR;
+    // 		deployinfo_ram += "CACHED_RAM" + i + "_NAME (RWAL) : ORIGIN = CACHED_RAM" + i + "_ADDR, LENGTH = CACHED_RAM" + i + "_SIZE" + CR;
+    // 		//  }
+    // 		//  }
+    // 	    }
+    // 	}
+    // 	}catch (Exception e){
+    // 	    e.printStackTrace();
+    // 	}
+    // 	return deployinfo_ram;
+    // }
 
     //fin ajout C.D.
 
diff --git a/src/main/java/ddtranslatorSoclib/toTopCell/TopCellGenerator.java b/src/main/java/ddtranslatorSoclib/toTopCell/TopCellGenerator.java
index 0d80082187..5d17140d46 100755
--- a/src/main/java/ddtranslatorSoclib/toTopCell/TopCellGenerator.java
+++ b/src/main/java/ddtranslatorSoclib/toTopCell/TopCellGenerator.java
@@ -1,45 +1,43 @@
-/* Copyright or (C) or Copr. GET / ENST, Telecom-Paris, Ludovic Apvrille
- * Daniela Genius, Lip6, UMR 7606 
- * 
- * ludovic.apvrille AT enst.fr
- * daniela.genius@lip6.fr
- * 
- * This software is a computer program whose purpose is to allow the
- * edition of TURTLE analysis, design and deployment diagrams, to
- * allow the generation of RT-LOTOS or Java code from this diagram,
- * and at last to allow the analysis of formal validation traces
- * obtained from external tools, e.g. RTL from LAAS-CNRS and CADP
- * from INRIA Rhone-Alpes.
- * 
- * This software is governed by the CeCILL  license under French law and
- * abiding by the rules of distribution of free software.  You can  use,
- * modify and/ or redistribute the software under the terms of the CeCILL
- * license as circulated by CEA, CNRS and INRIA at the following URL
- * "http://www.cecill.info".
- * 
- * As a counterpart to the access to the source code and  rights to copy,
- * modify and redistribute granted by the license, users are provided only
- * with a limited warranty  and the software's author,  the holder of the
- * economic rights,  and the successive licensors  have only  limited
- * liability.
- * 
- * In this respect, the user's attention is drawn to the risks associated
- * with loading,  using,  modifying and/or developing or reproducing the
- * software by the user in light of its specific status of free software,
- * that may mean  that it is complicated to manipulate,  and  that  also
- * therefore means  that it is reserved for developers  and  experienced
- * professionals having in-depth computer knowledge. Users are therefore
- * encouraged to load and test the software's suitability as regards their
- * requirements in conditions enabling the security of their systems and/or
- * data to be ensured and,  more generally, to use and operate it in the
- * same conditions as regards security.
- * 
- * The fact that you are presently reading this means that you have had
- * knowledge of the CeCILL license and that you accept its terms.
- */
-
-
 
+/**Copyright or (C) or Copr. GET / ENST, Telecom-Paris, Ludovic Apvrille
+  Daniela Genius, Lip6, UMR 7606 
+
+  ludovic.apvrille AT enst.fr
+  daniela.genius@lip6.fr
+
+  This software is a computer program whose purpose is to allow the 
+  edition of TURTLE analysis, design and deployment diagrams, to 
+  allow the generation of RT-LOTOS or Java code from this diagram, 
+  and at last to allow the analysis of formal validation traces 
+  obtained from external tools, e.g. RTL from LAAS-CNRS and CADP 
+  from INRIA Rhone-Alpes.
+
+  This software is governed by the CeCILL  license under French law and
+  abiding by the rules of distribution of free software.  You can  use, 
+  modify and/ or redistribute the software under the terms of the CeCILL
+  license as circulated by CEA, CNRS and INRIA at the following URL
+  "http://www.cecill.info". 
+
+  As a counterpart to the access to the source code and  rights to copy,
+  modify and redistribute granted by the license, users are provided only
+  with a limited warranty  and the software's author,  the holder of the
+  economic rights,  and the successive licensors  have only  limited
+  liability. 
+
+  In this respect, the user's attention is drawn to the risks associated
+  with loading,  using,  modifying and/or developing or reproducing the
+  software by the user in light of its specific status of free software,
+  that may mean  that it is complicated to manipulate,  and  that  also
+  therefore means  that it is reserved for developers  and  experienced
+  professionals having in-depth computer knowledge. Users are therefore
+  encouraged to load and test the software's suitability as regards their
+  requirements in conditions enabling the security of their systems and/or 
+  data to be ensured and,  more generally, to use and operate it in the 
+  same conditions as regards security. 
+
+  The fact that you are presently reading this means that you have had
+  knowledge of the CeCILL license and that you accept its terms.
+*/
 
 /* Generator of the top cell for simulation with SoCLib virtual component 
    library */
@@ -134,8 +132,8 @@ public class TopCellGenerator
       // of memory accesses other than channel    
          
       for  (AvatarConnector connector : avatardd.getConnectors()){
-     AvatarConnectingPoint my_p1= connector.get_p1();
-     AvatarConnectingPoint my_p2= connector.get_p2();
+     AvatarConnectingPoint my_p1= (AvatarConnectingPoint)connector.get_p1(); 
+     AvatarConnectingPoint my_p2= (AvatarConnectingPoint)connector.get_p2(); 
     
       //If a spy glass symbol is found, and component itself not yet marked 
       
@@ -225,25 +223,25 @@ public class TopCellGenerator
     public void saveFileDeploy(String path) {
 
 		try {
-          System.err.println(path + GENERATED_PATH + "deployinfo.h");
-			FileWriter fw = new FileWriter(path + GENERATED_PATH + "/deployinfo.h");			
-			deployinfo = Deployinfo.getDeployInfo();
-			fw.write(deployinfo);
-			fw.close();
-
- System.err.println(path + GENERATED_PATH + "deployinfo_map.h");
-			FileWriter fw_map = new FileWriter(path + GENERATED_PATH + "/deployinfo_map.h");
-			deployinfo_map = Deployinfo.getDeployInfoMap();
-			fw_map.write(deployinfo_map);
-			fw_map.close();
-
-			//ajout CD 9.6
- System.err.println(path + GENERATED_PATH + "deployinfo_ram.h");
+		    System.err.println(path + GENERATED_PATH + "deployinfo.h");
+		    FileWriter fw = new FileWriter(path + GENERATED_PATH + "/deployinfo.h");
+		    deployinfo = Deployinfo.getDeployInfo();
+		    fw.write(deployinfo);
+		    fw.close();
+		    
+		    System.err.println(path + GENERATED_PATH + "deployinfo_map.h");
+		    FileWriter fw_map = new FileWriter(path + GENERATED_PATH + "/deployinfo_map.h");
+		    deployinfo_map = TasksAndMainGenerator.getDeployInfoMap();
+		    fw_map.write(deployinfo_map);
+		    fw_map.close();
+		    
+		    //ajout CD 9.6
+		    System.err.println(path + GENERATED_PATH + "deployinfo_ram.h");
 		    FileWriter fw_ram = new FileWriter(path + GENERATED_PATH + "/deployinfo_ram.h");
-		    deployinfo_ram = TasksAndMainGenerator.getDeployInfoRam();  
+		    deployinfo_ram = TasksAndMainGenerator.getDeployInfoRam();
 		    fw_ram.write(deployinfo_ram);
 		    fw_ram.close();
-		} catch (IOException ex) {
+		} catch (Exception ex) {
 		    ex.printStackTrace();
 		}
 	}
diff --git a/src/main/java/ui/window/JDialogAvatarddExecutableCodeGeneration.java b/src/main/java/ui/window/JDialogAvatarddExecutableCodeGeneration.java
index 2c0272b94f..e888d156ca 100755
--- a/src/main/java/ui/window/JDialogAvatarddExecutableCodeGeneration.java
+++ b/src/main/java/ui/window/JDialogAvatarddExecutableCodeGeneration.java
@@ -154,8 +154,7 @@ public class JDialogAvatarddExecutableCodeGeneration extends javax.swing.JFrame
 						   String _pathCompileMPSoC, 
 						   String _pathExecuteMPSoC) {
 
-        super(title);
-
+        super(title);;
         f = _f;
         mgui = _mgui;
 
@@ -613,7 +612,7 @@ public class JDialogAvatarddExecutableCodeGeneration extends javax.swing.JFrame
 		    gene.includeUserCode(putUserCode.isSelected());
 		    gene.setTimeUnit(selectedUnit);
 		    gene.generateSoclib(debugmode.isSelected(), tracemode.isSelected());
-		      
+
 		    if ( avddspec == null) {
 			jta.append("Error: No AVATAR Deployment specification\n");
 		    } else {
-- 
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