From 617b89e76e5ae4868881529d3595527b5819001d Mon Sep 17 00:00:00 2001 From: Ludovic Apvrille <ludovic.apvrille@telecom-paristech.fr> Date: Thu, 23 May 2019 14:46:36 +0200 Subject: [PATCH] Addinh Hw archi --- .../java/tmltranslator/TMLArchitecture.java | 5 + .../java/tmltranslator/tonetwork/Link.java | 15 +- .../tmltranslator/tonetwork/TMAP2Network.java | 48 +++++- .../tonetwork/TranslatedRouter.java | 160 +++++++++++++++++- 4 files changed, 210 insertions(+), 18 deletions(-) diff --git a/src/main/java/tmltranslator/TMLArchitecture.java b/src/main/java/tmltranslator/TMLArchitecture.java index 9396ecdcc1..0fa5508605 100755 --- a/src/main/java/tmltranslator/TMLArchitecture.java +++ b/src/main/java/tmltranslator/TMLArchitecture.java @@ -130,6 +130,11 @@ public class TMLArchitecture { return null; } + public void makeHwLink(HwCommunicationNode bus, HwNode node) { + HwLink link = new HwLink(bus.getName() + "__" + node.getName()); + addHwLink(link); + } + public boolean hasCPU() { for (HwNode node : hwnodes) { diff --git a/src/main/java/tmltranslator/tonetwork/Link.java b/src/main/java/tmltranslator/tonetwork/Link.java index 5620618a53..e01d3ee58b 100644 --- a/src/main/java/tmltranslator/tonetwork/Link.java +++ b/src/main/java/tmltranslator/tonetwork/Link.java @@ -58,6 +58,7 @@ import java.util.Vector; public class Link { private int nbOfVCs; private TMLModeling tmlm; + private TMLArchitecture tarch; // Routers private TranslatedRouter previousRouter; @@ -71,12 +72,15 @@ public class Link { private String add = ""; + HwBus busBetweenRouters; - public Link(TMLModeling tmlm, TranslatedRouter previous, TranslatedRouter next, int nbOfVCs) { + + public Link(TMLArchitecture tarch, TMLModeling tmlm, TranslatedRouter previous, TranslatedRouter next, int nbOfVCs) { previousRouter = previous; nextRouter = next; this.nbOfVCs = nbOfVCs; this.tmlm = tmlm; + this.tarch = tarch; TraceManager.addDev("Adding link between previous (" + previousRouter.getXPos() + "," + previousRouter.getYPos() + ") and next (" + nextRouter.getXPos() + "," + nextRouter.getYPos() + ")"); @@ -108,8 +112,7 @@ public class Link { } - - public void generateLinks() { + private void generateLinks() { packetOut = new TMLEvent("evtPktOut__" + getNaming(), null, 8, true); @@ -133,6 +136,12 @@ public class Link { } } + private void generateHwComponents() { + busBetweenRouters = new HwBus("Bus_From_" + previousRouter.getYPos() + "_" + previousRouter.getXPos() + "_to_" + nextRouter.getYPos() + "_" + + nextRouter.getXPos()); + tarch.addHwNode(busBetweenRouters); + } + public String getNaming() { return "P_" + previousRouter.getXPos() + "_" + previousRouter.getYPos() + "_N_" + nextRouter.getXPos() + "_" + nextRouter.getYPos() + add; diff --git a/src/main/java/tmltranslator/tonetwork/TMAP2Network.java b/src/main/java/tmltranslator/tonetwork/TMAP2Network.java index 271db9669b..f8dd20eac3 100644 --- a/src/main/java/tmltranslator/tonetwork/TMAP2Network.java +++ b/src/main/java/tmltranslator/tonetwork/TMAP2Network.java @@ -57,6 +57,7 @@ import java.util.List; public class TMAP2Network<E> { private TMLModeling<?> tmlmodeling; + private TMLArchitecture tmlarchi; private TMLMapping<?> tmlmapping; private boolean debug; @@ -295,6 +296,7 @@ public class TMAP2Network<E> { // Create routers around tmlmodeling = tmlmapping.getTMLModeling(); + tmlarchi = tmlmapping.getTMLArchitecture(); // *** Create links and update routers accordingly // For each router, I consider all routers that are around the considered one @@ -307,7 +309,7 @@ public class TMAP2Network<E> { // There is a north router // link to next if (routers[i][j].playingTheRoleOfPrevious[k] == null) { - Link to = new Link(tmlmodeling, routers[i][j], routers[i-1][j], nbOfVCs); + Link to = new Link(tmlarchi, tmlmodeling, routers[i][j], routers[i-1][j], nbOfVCs); routers[i][j].playingTheRoleOfPrevious[k] = to; routers[i-1][j].playingTheRoleOfNext[getFrom(k)] = to; } @@ -319,7 +321,7 @@ public class TMAP2Network<E> { // There is a south router // link to next if (routers[i][j].playingTheRoleOfPrevious[k] == null) { - Link to = new Link(tmlmodeling, routers[i][j], routers[i+1][j], nbOfVCs); + Link to = new Link(tmlarchi, tmlmodeling, routers[i][j], routers[i+1][j], nbOfVCs); routers[i][j].playingTheRoleOfPrevious[k] = to; routers[i+1][j].playingTheRoleOfNext[getFrom(k)] = to; } @@ -330,7 +332,7 @@ public class TMAP2Network<E> { // There is an east router // link to next if (routers[i][j].playingTheRoleOfPrevious[k] == null) { - Link to = new Link(tmlmodeling, routers[i][j], routers[i][j+1], nbOfVCs); + Link to = new Link(tmlarchi, tmlmodeling, routers[i][j], routers[i][j+1], nbOfVCs); routers[i][j].playingTheRoleOfPrevious[k] = to; routers[i][j+1].playingTheRoleOfNext[getFrom(k)] = to; } @@ -342,7 +344,7 @@ public class TMAP2Network<E> { // There is an east router // link to next if (routers[i][j].playingTheRoleOfPrevious[k] == null) { - Link to = new Link(tmlmodeling, routers[i][j], routers[i][j-1], nbOfVCs); + Link to = new Link(tmlarchi, tmlmodeling, routers[i][j], routers[i][j-1], nbOfVCs); routers[i][j].playingTheRoleOfPrevious[k] = to; routers[i][j-1].playingTheRoleOfNext[getFrom(k)] = to; } @@ -379,14 +381,48 @@ public class TMAP2Network<E> { } } - // Make their routing + // Integrate into the TMLMapping + for(i=0; i<nocSize; i++) { + for(j=0; j<nocSize; j++) { + // We must find the number of apps connected on this router + String s = noc.getHwExecutionNode(i, j); + HwExecutionNode node = null; + HwBus bus; + if (s == null) { + TraceManager.addDev(("No HwExecutionNode for " + i + "_" + j)); + HwCPU cpu = new HwCPU("CPUfor_" + i + "_" + j); + tmla.addHwNode(cpu); + node = cpu; + + bus = new HwBus(cpu.getName() + "__bus"); + HwMemory mem = new HwMemory(cpu.getName() + "__mem"); + tmla.addHwNode(bus); + tmla.addHwNode(mem); + + HwLink cpuToBus = new HwLink(cpu.getName() + "__tocpu"); + cpuToBus.setNodes(bus, cpu); + tmla.addHwLink(cpuToBus); + + HwLink memToBus = new HwLink(cpu.getName() + "__tomem"); + memToBus.setNodes(bus, mem); + tmla.addHwLink(memToBus); + + } else { + node = tmlarchi.getHwExecutionNodeByName(s); + bus = tmla.getHwBusByName(node.getName() + "__bus"); + } + routers[i][j].makeHwArchitectureAndMapping(node, bus); + } + } + - // Connect channels to the NoC + + // Connect channels to the NoC // A bridge is put with the same position as the router as to allow classical paths not // to use the router diff --git a/src/main/java/tmltranslator/tonetwork/TranslatedRouter.java b/src/main/java/tmltranslator/tonetwork/TranslatedRouter.java index 42074b7403..1e5ad38a17 100644 --- a/src/main/java/tmltranslator/tonetwork/TranslatedRouter.java +++ b/src/main/java/tmltranslator/tonetwork/TranslatedRouter.java @@ -93,11 +93,19 @@ public class TranslatedRouter<E> { public Link[] playingTheRoleOfNext; // All my tasks - Vector<TMLTask> allTasks; + private Vector<TMLTask> allTasks; - // Out of the NoC - FakeTaskOut fto; + private Vector<TaskMUXAppDispatch> muxTasks; + private TaskNetworkInterface tniIn; + private HashMap<Integer, TaskINForDispatch> dispatchIns; + private TaskINForVC[][] dispatchInVCs; + private TaskOUTForVC[][] dispatchOutVCs; + private HashMap<Integer, TaskOUTForDispatch> dispatchOuts; + private TaskNetworkInterfaceOUT tniOut; + private FakeTaskOut fto; + // Hw + HwExecutionNode node; public TranslatedRouter(TMAP2Network<?> main, TMLMapping<?> tmlmap, HwNoC noc, List<TMLChannel> channelsViaNoc, int nbOfVCs, int xPos, int yPos) { this.main = main; @@ -188,7 +196,7 @@ public class TranslatedRouter<E> { // We can create the MUX task: one mux task for each VC - Vector<TaskMUXAppDispatch> muxTasks = new Vector<>(); + muxTasks = new Vector<>(); for (i = 0; i < nbOfVCs; i++) { // Now that we know all channels, we can generate the MUX tasks // We need one event par outputChannel @@ -228,7 +236,7 @@ public class TranslatedRouter<E> { inputEventsFromMUX.add(tmux.getOutputEvent()); } - TaskNetworkInterface tniIn = new TaskNetworkInterface("NI_IN_" + nameOfExecNode, null, + tniIn = new TaskNetworkInterface("NI_IN_" + nameOfExecNode, null, null); tmlm.addTask(tniIn); allTasks.add(tniIn); @@ -251,7 +259,7 @@ public class TranslatedRouter<E> { // IN NOC - One for each input // We need one output channel per VC and one output event per VC - HashMap<Integer, TaskINForDispatch> dispatchIns = new HashMap<>(); + dispatchIns = new HashMap<>(); for (int portNb = 0; portNb < NB_OF_PORTS; portNb++) { if (playingTheRoleOfNext[portNb] != null) { TaskINForDispatch inDispatch = new TaskINForDispatch("IN_" + nameOfExecNode + "_" + portNb, null, @@ -292,7 +300,7 @@ public class TranslatedRouter<E> { } // IN VC - TaskINForVC[][] dispatchInVCs = new TaskINForVC[NB_OF_PORTS][nbOfVCs]; + dispatchInVCs = new TaskINForVC[NB_OF_PORTS][nbOfVCs]; for (int portNb = 0; portNb < NB_OF_PORTS; portNb++) { if (playingTheRoleOfNext[portNb] != null) { for (int vcNb = 0; vcNb < nbOfVCs; vcNb++) { @@ -333,7 +341,7 @@ public class TranslatedRouter<E> { } // OUT VC - TaskOUTForVC[][] dispatchOutVCs = new TaskOUTForVC[NB_OF_PORTS][nbOfVCs]; + dispatchOutVCs = new TaskOUTForVC[NB_OF_PORTS][nbOfVCs]; for (int portNb = 0; portNb < NB_OF_PORTS; portNb++) { if (playingTheRoleOfPrevious[portNb] != null) { //TraceManager.addDev("I have a router after me at port =" + portNb); @@ -371,7 +379,7 @@ public class TranslatedRouter<E> { // OUT NOC - One for each output of the considered router // We need one output channel for each exit and one output event per VC - HashMap<Integer, TaskOUTForDispatch> dispatchOuts = new HashMap<>(); + dispatchOuts = new HashMap<>(); for (int portNb = 0; portNb < NB_OF_PORTS; portNb++) { if (playingTheRoleOfPrevious[portNb] != null) { @@ -542,6 +550,9 @@ public class TranslatedRouter<E> { playingTheRoleOfPrevious[NB_OF_PORTS-1] = networkInterfaceOut; } + public String getPositionNaming() { + return "_" + xPos + "_" + yPos; + } public String toString() { String ret = "Router at " + xPos + " " + yPos + "\n"; @@ -570,6 +581,137 @@ public class TranslatedRouter<E> { ret += "\n"; } return ret; + } + + + // DANGER: also make th emapping of channels + // ALSO: initial, last tasks + public void makeHwArchitectureAndMapping(HwExecutionNode execNode, HwBus busToInternalDomain) { + TMLArchitecture tmla = tmlmap.getTMLArchitecture(); + int i, j, k; + + // We first need a bridge for the internal domain + HwBridge mainBridge = new HwBridge("BridgeIntennal" + getPositionNaming()); + tmla.addHwNode(mainBridge); + tmla.makeHwLink(busToInternalDomain, mainBridge); + + + // NIIN bus + HwBus busNIIN = new HwBus("BusNetworkiInterfaceIN" + getPositionNaming()); + tmla.addHwNode(busNIIN); + + // For each VC, we create a bus and a cpu. The bus connects to the main bridge + for(i=0; i<nbOfVCs; i++) { + HwCPU cpu = new HwCPU("CPUForMUX_VC" + i + getPositionNaming()); + tmla.addHwNode(cpu); + tmlmap.addTaskToHwExecutionNode(muxTasks.get(i), cpu); + + HwBus bus = new HwBus("BusForMUX_VC" + i + getPositionNaming()); + tmla.addHwNode(bus); + + tmla.makeHwLink(bus, mainBridge); + + tmla.makeHwLink(busNIIN, cpu); + } + + // Network interface IN common to all MUX VCs + // Processor, mem, bus and bridge + HwCPU cpuNIIN = new HwCPU("CPUNetworkiInterfaceIN" + getPositionNaming()); + tmla.addHwNode(cpuNIIN); + tmlmap.addTaskToHwExecutionNode(tniIn, cpuNIIN); + + HwMemory memNIIN = new HwMemory("MemNetworkiInterfaceIN" + getPositionNaming()); + tmla.addHwNode(memNIIN); + + HwBridge bridgeNIIN = new HwBridge("BridgeNetworkiInterfaceIN" + getPositionNaming()); + + tmla.makeHwLink(busNIIN, cpuNIIN); + tmla.makeHwLink(busNIIN, memNIIN); + tmla.makeHwLink(busNIIN, bridgeNIIN); + + + // IN and INVC + for (int portNb = 0; portNb < NB_OF_PORTS; portNb++) { + if (playingTheRoleOfNext[portNb] != null) { + // We have an IN on that port. Connects on the bus of the correcponding link + HwCPU cpuIN = new HwCPU("cpuIN_" + portNb + getPositionNaming()); + tmla.addHwNode(cpuIN); + tmlmap.addTaskToHwExecutionNode(dispatchIns.get(portNb), cpuIN); + + // connection to the right bus + if (portNb < NB_OF_PORTS-1) { + // external + tmla.makeHwLink(playingTheRoleOfNext[portNb].busBetweenRouters, cpuIN); + } else { + // internal + HwBus busInternalIN = new HwBus("BusInternalINternal" + getPositionNaming()); + tmla.addHwNode((busInternalIN)); + tmla.makeHwLink(busInternalIN, bridgeNIIN); + tmla.makeHwLink(busInternalIN, cpuIN); + } + + // For each IN VC, we do the Hw Arch: bus, cpu, mem + for(i=0; i<nbOfVCs; i++) { + HwCPU cpuINVC = new HwCPU("cpuINVC_" + portNb + "_" + i + getPositionNaming()); + tmla.addHwNode(cpuINVC); + tmlmap.addTaskToHwExecutionNode(dispatchInVCs[portNb][i], cpuINVC); + HwMemory memINVC = new HwMemory("memINVC" + portNb + "_" + i+ getPositionNaming()); + tmla.addHwNode(memINVC); + HwBus busINVC = new HwBus("busINVC" + portNb + "_" + i + getPositionNaming()); + tmla.addHwNode(busINVC); + tmla.makeHwLink(busINVC, cpuINVC); + tmla.makeHwLink(busINVC, memINVC); + tmla.makeHwLink(busINVC, cpuIN); + } + } + } + + HwBridge bridgeNIOUT = new HwBridge("BridgeNetworkiInterfaceOUT" + getPositionNaming()); + + // OUTVC and OUT + for (int portNb = 0; portNb < NB_OF_PORTS; portNb++) { + if (playingTheRoleOfPrevious[portNb] != null) { + // We have an IN on that port. Connects on the bus of the correcponding link + HwCPU cpuOUT = new HwCPU("cpuOUT_" + portNb + getPositionNaming()); + tmla.addHwNode(cpuOUT); + tmlmap.addTaskToHwExecutionNode(dispatchOuts.get(portNb), cpuOUT); + + // connection to the right bus + if (portNb < NB_OF_PORTS-1) { + // external + tmla.makeHwLink(playingTheRoleOfPrevious[portNb].busBetweenRouters, cpuOUT); + } else { + // internal + HwBus busInternalOUT = new HwBus("BusInternalOUTternal" + getPositionNaming()); + tmla.addHwNode((busInternalOUT)); + tmla.makeHwLink(busInternalOUT, bridgeNIOUT); + tmla.makeHwLink(busInternalOUT, cpuOUT); + } + + // For each IN VC, we do the Hw Arch: bus, cpu, mem + for(i=0; i<nbOfVCs; i++) { + HwCPU cpuOUTVC = new HwCPU("cpuOUTVC_" + portNb + "_" + i + getPositionNaming()); + tmla.addHwNode(cpuOUTVC); + tmlmap.addTaskToHwExecutionNode(dispatchOutVCs[portNb][i], cpuOUTVC); + HwMemory memOUTVC = new HwMemory("memOUTVC" + portNb + "_" + i+ getPositionNaming()); + tmla.addHwNode(memOUTVC); + HwBus busOUTVC = new HwBus("busINVC" + portNb + "_" + i + getPositionNaming()); + tmla.addHwNode(busOUTVC); + tmla.makeHwLink(busOUTVC, cpuOUTVC); + tmla.makeHwLink(busOUTVC, memOUTVC); + tmla.makeHwLink(busOUTVC, cpuOUT); + } + } + } + + // Network interface out + // Basically connects to the main bridge + + + + + + } } -- GitLab