From 7bbefbd919fb18d79a79dd31f551f56c67c09c79 Mon Sep 17 00:00:00 2001
From: Daniela Genius <genius@debussy.soc.lip6.fr>
Date: Thu, 23 Feb 2017 15:49:57 +0100
Subject: [PATCH] make spies co-exist in topcell
---
src/ddtranslatorSoclib/toTopCell/Code.java | 22 +-----------------
.../toTopCell/Declaration.java | 10 ++++----
src/ddtranslatorSoclib/toTopCell/NetList.java | 23 ++++++++++---------
3 files changed, 18 insertions(+), 37 deletions(-)
diff --git a/src/ddtranslatorSoclib/toTopCell/Code.java b/src/ddtranslatorSoclib/toTopCell/Code.java
index a87425e37d..2f361b1228 100755
--- a/src/ddtranslatorSoclib/toTopCell/Code.java
+++ b/src/ddtranslatorSoclib/toTopCell/Code.java
@@ -146,27 +146,7 @@ public class Code {
}
}
} */
-
- //If there is a spy, add logger or stats to vci interface
- for (AvatarCPU cpu : TopCellGenerator.avatardd.getAllCPU()) {
- // if(){
- if(cpu.getMonitored()==1){
- creation=creation+
- "vci_logger0.p_clk(signal_clk);" +CR+
- "vci_logger0.p_resetn(signal_resetn);" +CR+
- "vci_logger0.p_vci(p_vci(m));" +CR2;
-
- }
- else{
- if(cpu.getMonitored()==2){
- creation=creation+
- "mwmr_stats0.p_clk(signal_clk);" +CR+
- "mwmr_stats0.p_resetn(signal_resetn);" +CR+
- "mwmr_stats0.p_vci(p_vci(m));" +CR2;
- }
- }
-}
-//}
+
creation=creation+"template <class Iss>" + CR +
"INIT_TOOLS(initialize_tools){" + CR ;
diff --git a/src/ddtranslatorSoclib/toTopCell/Declaration.java b/src/ddtranslatorSoclib/toTopCell/Declaration.java
index 155fe2e865..6127735a64 100755
--- a/src/ddtranslatorSoclib/toTopCell/Declaration.java
+++ b/src/ddtranslatorSoclib/toTopCell/Declaration.java
@@ -230,21 +230,21 @@ if(nb_clusters==0){
if (cpu.getMonitored()==1){
- declaration += "soclib::caba::VciLogger<vci_param> logger"+i+"(\"logger" + i+"\",maptab);" + CR2;
+ declaration += "soclib::caba::VciLogger<vci_param> vci_logger"+i+"(\"logger" + i+"\",maptab);" + CR2;
i++;
}
- else{
- if (cpu.getMonitored()==2){
+ /* else{
+ if (cpu.getMonitored()==2){
String strArray="";
//DG 30.01. no channels in case of cpu monitoring; does this make sense? channels associated to RAM not CPU and potentially any CPU can access any RAM...think about
declaration += "soclib::caba::VciMwmrStats<vci_param> mwmr_stats"+i+"(\"mwmr_stats" + i+"\",maptab, data_ldr, \"mwmr"+i+".log\",stringArray("+strArray+"NULL));" + CR2;
i++;
}
- }
+ }*/
}
-
+ i=0;
//monitoring RAM either by logger(1) ou stats (2)
for (AvatarRAM ram : TopCellGenerator.avatardd.getAllRAM()) {
diff --git a/src/ddtranslatorSoclib/toTopCell/NetList.java b/src/ddtranslatorSoclib/toTopCell/NetList.java
index 6dd593dee7..b7a996c73f 100755
--- a/src/ddtranslatorSoclib/toTopCell/NetList.java
+++ b/src/ddtranslatorSoclib/toTopCell/NetList.java
@@ -377,24 +377,25 @@ public class NetList {
}
}*/
-i=0;
+ //If there is a spy, add logger or stats to vci interface
+
+ i=0;
for (AvatarCPU cpu : TopCellGenerator.avatardd.getAllCPU()) {
- // if(){
+ int number = cpu.getNo_proc();
if(cpu.getMonitored()==1){
netlist=netlist+
- "vci_logger0.p_clk(signal_clk);" +CR+
- "vci_logger0.p_resetn(signal_resetn);" +CR+
- "vci_logger0.p_vci(p_vci(m));" +CR2;
-
+ "vci_logger"+i+".p_clk(signal_clk);" +CR+
+ "vci_logger"+i+".p_resetn(signal_resetn);" +CR+
+ "vci_logger"+i+".p_vci(signal_vci_m["+number+"]);" +CR2;
}
- else{
+ /* else{//stats pas encore pour CPU
if(cpu.getMonitored()==2){
netlist=netlist+
- "mwmr_stats0.p_clk(signal_clk);" +CR+
- "mwmr_stats0.p_resetn(signal_resetn);" +CR+
- "mwmr_stats0.p_vci(p_vci(i));" +CR2;
+ "mwmr_stats"+i+".p_clk(signal_clk);" +CR+
+ "mwmr_stats"+i+".p_resetn(signal_resetn);" +CR+
+ "mwmr_stats"+i+".p_vci(signal_vci_m["+number+"]);" +CR2;
}
- }
+ }*/
i++;
}
--
GitLab