Commit 8d776e31 authored by Ludovic Apvrille's avatar Ludovic Apvrille
Browse files

Adding new logo: smiling diplo

parent e1456da4
......@@ -16,7 +16,7 @@
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......@@ -13,8 +13,9 @@
div.column{display: inline-block; vertical-align: top; width: 50%;} \n\
div.hanging-indent{margin-left: 1.5em; text-indent: -1.5em;} \n\
ul.task-list{list-style: none;} \n\
.display.math{display: block; text-align: center; margin: 0.5rem auto;} \n\
</style> \n\
<link rel=\"stylesheet\" href=\"/home/levan/Desktop/TTool/src/main/resources/help/help.css\" /> \n\
<link rel=\"stylesheet\" href=\"/Users/ludovicapvrille/TTool/src/main/resources/help/help.css\" /> \n\
<!--[if lt IE 9]> \n\
<script src=\"//cdnjs.cloudflare.com/ajax/libs/html5shiv/3.7.3/html5shiv-printshiv.min.js\"></script> \n\
<![endif]--> \n\
......@@ -24,7 +25,7 @@
<h2 id=\"objective\">Objective</h2> \n\
<p>The simulator of DIPLODOCUS intends to simulate a DIPLODOCUS mapping, taking into account functional tasks, the system architectures (CPU, buses, etc.) and the allocations of tasks and their communucations to the system architecture</p> \n\
<h2 id=\"generating-simulation-code-and-commiling-it\">Generating simulation code and commiling it?</h2> \n\
<p>The first step is to create a DIPLODOCUS mapping. Once the mapping model has been checked against syntax errors <img src=\"file:../ui/util/checkmodel.gif\" alt=\"syntax checking icon\" />, it is possible to generate a C++ code <img src=\"file:../ui/util/gensystc.gif\" alt=\"simulation code generation icon\" /> that represents the mapping model. If you are using a model in TTool, then the code is generated by default in TTool/simulators/c++2 for models. If your model has been made in a project, then the code is generated into the \"c++_code\" subdirectory of your project.</p> \n\
<p>The first step is to create a DIPLODOCUS mapping. Once the mapping model has been checked against syntax errors <img src=\"file:../ui/util/checkmodel.gif\" alt=\"syntax checking icon\" />, it is possible to generate a C++ code <img src=\"file:../ui/util/gensystc.gif\" alt=\"simulation code generation icon\" /> that represents the mapping model. If you are using a model in TTool, then the code is generated by default in TTool/simulators/c++2 for models. If your model has been made in a project, then the code is generated into the c++_code subdirectory of your project.</p> \n\
<p>The second step is to compile the code. You can directly do it from TTool with the code generation window, second tab. Another option is to open a terminal, and to enter the following command:</p> \n\
<pre><code>$ make</code></pre> \n\
<h2 id=\"using-the-simulator-from-ttool\">Using the simulator from TTool</h2> \n\
......@@ -482,7 +483,7 @@ Not defined: &lt;unknow param&gt;</code></pre> \n\
<td style=\"text-align: center;\">show-timeline-trace</td> \n\
<td style=\"text-align: center;\">stlt</td> \n\
<td style=\"text-align: center;\">7 4</td> \n\
<td style=\"text-align: center;\">Show the current timeline diagram tracein HTML format</td> \n\
<td style=\"text-align: center;\">Show the current timeline diagram trace in HTML format</td> \n\
<td style=\"text-align: center;\">[Type: 2] Task List</td> \n\
<td style=\"text-align: center;\">[Type: 1] Scale idle time: 0 -&gt; no, 1 -&gt; yes</td> \n\
<td style=\"text-align: center;\">[Type: 2] Start Time</td> \n\
......
......@@ -51,7 +51,7 @@ double CPU::averageLoad (unsigned int n) const{
_maxEndTime=max(_maxEndTime,_endTime);
}
}
std::cout<<"max end time is "<<_maxEndTime<<std::endl;
//std::cout<<"max end time is "<<_maxEndTime<<std::endl;
for( TransactionList::const_iterator i = _transactList.begin(); i != _transactList.end(); ++i ) {
if( (*i)->getTransactCoreNumber() == n ){
_averageLoad += (*i)->getEndTime() - (*i)->getStartTime();
......@@ -200,8 +200,8 @@ std::map<TMLTask*, std::string> CPU::HWTIMELINE2HTML(std::ostringstream& myfile,
}
}
for( TransactionList::const_iterator i = _transactListClone.begin(); i != _transactListClone.end(); ++i ) {
std::cout<<"get transaction core number is: "<<(*i)->getTransactCoreNumber()<<std::endl;
std::cout<<"time : "<<_cycleTime<<std::endl;
//std::cout<<"get transaction core number is: "<<(*i)->getTransactCoreNumber()<<std::endl;
//std::cout<<"time : "<<_cycleTime<<std::endl;
//std::cout << "CPU:calcSTL: html of CPU " << _name << ": " << (*i)->toString() << std::endl;
if( (*i)->getTransactCoreNumber() == this->_cycleTime ){
TMLTransaction* aCurrTrans = *i;
......@@ -279,9 +279,18 @@ std::map<TMLTask*, std::string> CPU::HWTIMELINE2HTML(std::ostringstream& myfile,
// Issue #4
TMLTask* task = aCurrTrans->getCommand()->getTask();
const std::string cellClass = determineHTMLCellClass( taskCellClasses, task, nextCellClassIndex );
std::string aCurrTransName=aCurrTrans->toShortString();
unsigned int indexTrans=aCurrTransName.find_first_of(":");
std::string aCurrContent=aCurrTransName.substr(indexTrans+1,2);
std::string aCurrTransName = aCurrTrans->toShortString();
unsigned int indexTrans = aCurrTransName.find_first_of(":");
std::string aNextCont = aCurrTransName.substr(indexTrans+2,3);
std::string aCurrContent;
std::string a = "a";
//std::cout << "aNextCont:" << aNextCont<< ": " << a << std::endl;
if (aNextCont[1] == a[0]) {
aCurrContent=aCurrTransName.substr(indexTrans+1,3);
} else {
aCurrContent=aCurrTransName.substr(indexTrans+1,2);
}
if(!(!(aCurrTrans->getCommand()->getActiveDelay()) && aCurrTrans->getCommand()->isDelayTransaction())){
if (isScalable && endTimeOfCore >= MIN_RESIZE_THRESHOLD && aLength > MIN_RESIZE_TRANS){
int tempLength = 0;
......@@ -388,8 +397,8 @@ void CPU::HW2HTML(std::ofstream& myfile) const {
}
for( TransactionList::const_iterator i = _transactList.begin(); i != _transactList.end(); ++i ) {
std::cout<<"get transaction core number is: "<<(*i)->getTransactCoreNumber()<<std::endl;
std::cout<<"time : "<<_cycleTime<<std::endl;
//std::cout<<"get transaction core number is: "<<(*i)->getTransactCoreNumber()<<std::endl;
//std::cout<<"time : "<<_cycleTime<<std::endl;
//std::cout << "CPU:calcSTL: html of CPU " << _name << ": " << (*i)->toString() << std::endl;
if( (*i)->getTransactCoreNumber() == this->_cycleTime ){
TMLTransaction* aCurrTrans = *i;
......@@ -533,8 +542,8 @@ void CPU::schedule2HTML(std::ofstream& myfile) const {
}
}
for( TransactionList::const_iterator i = _transactList.begin(); i != _transactList.end(); ++i ) {
std::cout<<"get transaction core number is: "<<(*i)->getTransactCoreNumber()<<std::endl;
std::cout<<"time : "<<_cycleTime<<std::endl;
//std::cout<<"get transaction core number is: "<<(*i)->getTransactCoreNumber()<<std::endl;
//std::cout<<"time : "<<_cycleTime<<std::endl;
//std::cout << "CPU:calcSTL: html of CPU " << _name << ": " << (*i)->toString() << std::endl;
if( (*i)->getTransactCoreNumber() == this->_cycleTime ){
TMLTransaction* aCurrTrans = *i;
......
......@@ -763,7 +763,16 @@ std::map<TMLTask*, std::string> FPGA::HWTIMELINE2HTML(std::ostringstream& myfile
const std::string cellClass = determineHTMLCellClass( taskCellClasses1, _htmlCurrTask, nextCellClassIndex1);
std::string aCurrTransName=aCurrTrans->toShortString();
unsigned int indexTrans=aCurrTransName.find_first_of(":");
std::string aCurrContent=aCurrTransName.substr(indexTrans+1,2);
std::string aNextCont = aCurrTransName.substr(indexTrans+2,3);
std::string aCurrContent;
std::string a = "a";
//std::cout << "aNextCont:" << aNextCont<< ": " << a << std::endl;
if (aNextCont[1] == a[0]) {
aCurrContent=aCurrTransName.substr(indexTrans+1,3);
} else {
aCurrContent=aCurrTransName.substr(indexTrans+1,2);