From ab46c196896219c155270ad8c69bddf68d66a207 Mon Sep 17 00:00:00 2001
From: "le.truong" <le.truong@telecom-paris.fr>
Date: Mon, 21 Jun 2021 12:24:47 +0200
Subject: [PATCH] add function to parse data from .tmap .tarchi .tml file
---
.../TMLArchiTextSpecification.java | 7 ++++++-
.../tmltranslator/TMLTextSpecification.java | 2 +-
.../BusSliceTimeConfigurationTest.java | 21 ++++++++++++-------
.../simulator/bus_rr_not_preempted.tarchi | 1 +
.../simulator/bus_rr_not_preempted.tml | 8 +++----
.../simulator/bus_rr_preempted.tarchi | 3 ++-
.../simulator/bus_rr_preempted.tml | 8 +++----
.../simulator/bus_rrpb_not_preempted.tarchi | 1 +
.../simulator/bus_rrpb_not_preempted.tml | 8 +++----
.../simulator/bus_rrpb_preempted.tarchi | 3 ++-
.../simulator/bus_rrpb_preempted.tml | 8 +++----
11 files changed, 42 insertions(+), 28 deletions(-)
diff --git a/src/main/java/tmltranslator/TMLArchiTextSpecification.java b/src/main/java/tmltranslator/TMLArchiTextSpecification.java
index 6d13fb1a7d..77402c8cb2 100755
--- a/src/main/java/tmltranslator/TMLArchiTextSpecification.java
+++ b/src/main/java/tmltranslator/TMLArchiTextSpecification.java
@@ -78,7 +78,7 @@ public class TMLArchiTextSpecification {
"maxConsecutiveIdleCycles", "reconfigurationTime", "execiTime", "execcTime", "scheduling", "clockDivider"};
private String linkparameters[] = {"bus", "node", "priority"};
private String hwaparameters[] = {"byteDataSize", "execiTime", "execcTime", "clockDivider"};
- private String busparameters[] = {"byteDataSize", "pipelineSize", "arbitration", "clockDivider"};
+ private String busparameters[] = {"byteDataSize", "pipelineSize", "arbitration", "sliceTime", "clockDivider"};
private String bridgeparameters[] = {"bufferByteSize", "clockDivider"};
private String memoryparameters[] = {"byteDataSize", "clockDivider"};
private String nocparameters[] = {"bufferbytesize", "nocSize", "clockdivider"};
@@ -225,6 +225,7 @@ public class TMLArchiTextSpecification {
code += set + "byteDataSize " + bus.byteDataSize + CR;
code += set + "pipelineSize " + bus.pipelineSize + CR;
code += set + "arbitration " + bus.arbitration + CR;
+ code += set + "sliceTime " + bus.sliceTime + CR;
}
@@ -774,6 +775,10 @@ public class TMLArchiTextSpecification {
if (_split[2].toUpperCase().equals("CLOCKDIVIDER")) {
bus.clockRatio = Integer.decode(_split[3]).intValue();
}
+
+ if (_split[2].toUpperCase().equals("SLICETIME")) {
+ bus.sliceTime = Integer.decode(_split[3]).intValue();
+ }
}
if (node instanceof HwBridge) {
diff --git a/src/main/java/tmltranslator/TMLTextSpecification.java b/src/main/java/tmltranslator/TMLTextSpecification.java
index 4b6cf17bff..820491a04b 100755
--- a/src/main/java/tmltranslator/TMLTextSpecification.java
+++ b/src/main/java/tmltranslator/TMLTextSpecification.java
@@ -914,13 +914,13 @@ public class TMLTextSpecification<E> {
ch = new TMLChannel(_split[1], null);
ch.setTypeByName(_split[2]);
+ ch.setMax(tmp);// the capacity already calculated with _split[4]
try {
tmp = Integer.decode(_split[3]).intValue();
} catch (Exception e) {
tmp = 4;
}
ch.setSize(tmp);
- ch.setMax(tmp);
for (i = 5 + dec; i < _split.length; i++) {
if (i != indexOfIN) {
diff --git a/ttool/src/test/java/tmltranslator/BusSliceTimeConfigurationTest.java b/ttool/src/test/java/tmltranslator/BusSliceTimeConfigurationTest.java
index 6455351e8c..3e3084975e 100644
--- a/ttool/src/test/java/tmltranslator/BusSliceTimeConfigurationTest.java
+++ b/ttool/src/test/java/tmltranslator/BusSliceTimeConfigurationTest.java
@@ -2,17 +2,16 @@ package tmltranslator;
import common.ConfigurationTTool;
import common.SpecConfigTTool;
-import graph.AUTGraph;
import myutil.FileUtils;
import org.junit.Before;
import org.junit.BeforeClass;
import org.junit.Test;
import req.ebrdd.EBRDD;
import tepe.TEPE;
+import test.AbstractTest;
import tmltranslator.tomappingsystemc2.DiploSimulatorFactory;
import tmltranslator.tomappingsystemc2.IDiploSimulatorCodeGenerator;
import tmltranslator.tomappingsystemc2.Penalties;
-import ui.AbstractUITest;
import java.io.BufferedReader;
import java.io.File;
@@ -22,11 +21,11 @@ import java.util.List;
import static org.junit.Assert.assertTrue;
-public class BusSliceTimeConfigurationTest extends AbstractUITest {
+public class BusSliceTimeConfigurationTest extends AbstractTest {
private final String DIR_GEN = "test_diplo_simulator/";
private final String[] MODELS_BUS_SLICE_TIME = {"bus_rr_preempted", "bus_rr_not_preempted","bus_rrpb_preempted", "bus_rrpb_not_preempted"};
- private final Integer[] EXPECTED_RESULT = {5, 2, 5, 2};
+ private final String[] EXPECTED_RESULT = {"20 - 2", "10 - 2", "10 - 2", "10 - 2"};
private String SIM_DIR;
private static String CPP_DIR = "../../../../simulators/c++2/";
@@ -175,16 +174,22 @@ public class BusSliceTimeConfigurationTest extends AbstractUITest {
File graphFile = new File(graphPath + ".txt");
String graphData = "";
- String findStr = "Execi";
+ String findStr0 = "Application__Src0: Write";
+ String findStr1 = "Application__Src1: Write";
try {
graphData = FileUtils.loadFileData(graphFile);
} catch (Exception e) {
assertTrue(false);
}
- int countExecI = graphData.split(findStr, -1).length-1;
- System.out.println("Number of ExecI transactions in model " + s + ": " + countExecI);
- assertTrue(countExecI == EXPECTED_RESULT[i]);
+ String result = "";
+ int countExecI = graphData.split(findStr0, -1).length-1;
+ System.out.println("Number of Write transactions of Src0 in model " + s + ": " + countExecI);
+ result += countExecI;
+ countExecI = graphData.split(findStr1, -1).length-1;
+ System.out.println("Number of Write transactions of Src1 in model " + s + ": " + countExecI);
+ result += " - " + countExecI;
+ assertTrue(result.equals(EXPECTED_RESULT[i]));
}
}
}
diff --git a/ttool/src/test/resources/tmltranslator/simulator/bus_rr_not_preempted.tarchi b/ttool/src/test/resources/tmltranslator/simulator/bus_rr_not_preempted.tarchi
index d7d8c5ba4c..75e3cafa4f 100644
--- a/ttool/src/test/resources/tmltranslator/simulator/bus_rr_not_preempted.tarchi
+++ b/ttool/src/test/resources/tmltranslator/simulator/bus_rr_not_preempted.tarchi
@@ -9,6 +9,7 @@ NODE BUS Bus0
SET Bus0 byteDataSize 1
SET Bus0 pipelineSize 1
SET Bus0 arbitration 0
+SET Bus0 sliceTime 10000
SET Bus0 clockDivider 1
NODE CPU TGT
diff --git a/ttool/src/test/resources/tmltranslator/simulator/bus_rr_not_preempted.tml b/ttool/src/test/resources/tmltranslator/simulator/bus_rr_not_preempted.tml
index c8739d7844..756ed45bdd 100644
--- a/ttool/src/test/resources/tmltranslator/simulator/bus_rr_not_preempted.tml
+++ b/ttool/src/test/resources/tmltranslator/simulator/bus_rr_not_preempted.tml
@@ -19,7 +19,7 @@ TASK Application__Src0
//Local variables
//Behavior
- WRITE Application__c0 5
+ WRITE Application__c0 200
EXECI 400
ENDTASK
@@ -28,7 +28,7 @@ TASK Application__Src1
//Local variables
//Behavior
- WRITE Application__c1 5
+ WRITE Application__c1 10
EXECI 300
ENDTASK
@@ -37,7 +37,7 @@ TASK Application__Tgt0
//Local variables
//Behavior
- READ Application__c0 5
+ READ Application__c0 200
ENDTASK
TASK Application__Tgt1
@@ -45,6 +45,6 @@ TASK Application__Tgt1
//Local variables
//Behavior
- READ Application__c1 5
+ READ Application__c1 10
ENDTASK
diff --git a/ttool/src/test/resources/tmltranslator/simulator/bus_rr_preempted.tarchi b/ttool/src/test/resources/tmltranslator/simulator/bus_rr_preempted.tarchi
index 97d0344ae1..2fea812680 100644
--- a/ttool/src/test/resources/tmltranslator/simulator/bus_rr_preempted.tarchi
+++ b/ttool/src/test/resources/tmltranslator/simulator/bus_rr_preempted.tarchi
@@ -1,5 +1,5 @@
// Master clock frequency - in MHz
-MASTERCLOCKFREQUENCY 200
+MASTERCLOCKFREQUENCY 20
NODE MEMORY Memory0
SET Memory0 byteDataSize 4
@@ -9,6 +9,7 @@ NODE BUS Bus0
SET Bus0 byteDataSize 1
SET Bus0 pipelineSize 1
SET Bus0 arbitration 0
+SET Bus0 sliceTime 1
SET Bus0 clockDivider 1
NODE CPU TGT
diff --git a/ttool/src/test/resources/tmltranslator/simulator/bus_rr_preempted.tml b/ttool/src/test/resources/tmltranslator/simulator/bus_rr_preempted.tml
index fcb7571789..a33ed2cd67 100644
--- a/ttool/src/test/resources/tmltranslator/simulator/bus_rr_preempted.tml
+++ b/ttool/src/test/resources/tmltranslator/simulator/bus_rr_preempted.tml
@@ -19,7 +19,7 @@ TASK Application__Src0
//Local variables
//Behavior
- WRITE Application__c0 5
+ WRITE Application__c0 200
EXECI 400
ENDTASK
@@ -28,7 +28,7 @@ TASK Application__Src1
//Local variables
//Behavior
- WRITE Application__c1 5
+ WRITE Application__c1 10
EXECI 300
ENDTASK
@@ -37,7 +37,7 @@ TASK Application__Tgt0
//Local variables
//Behavior
- READ Application__c0 5
+ READ Application__c0 200
ENDTASK
TASK Application__Tgt1
@@ -45,6 +45,6 @@ TASK Application__Tgt1
//Local variables
//Behavior
- READ Application__c1 5
+ READ Application__c1 10
ENDTASK
diff --git a/ttool/src/test/resources/tmltranslator/simulator/bus_rrpb_not_preempted.tarchi b/ttool/src/test/resources/tmltranslator/simulator/bus_rrpb_not_preempted.tarchi
index 4ca7e0e889..b802860667 100644
--- a/ttool/src/test/resources/tmltranslator/simulator/bus_rrpb_not_preempted.tarchi
+++ b/ttool/src/test/resources/tmltranslator/simulator/bus_rrpb_not_preempted.tarchi
@@ -9,6 +9,7 @@ NODE BUS Bus0
SET Bus0 byteDataSize 1
SET Bus0 pipelineSize 1
SET Bus0 arbitration 1
+SET Bus0 sliceTime 10000
SET Bus0 clockDivider 1
NODE CPU TGT
diff --git a/ttool/src/test/resources/tmltranslator/simulator/bus_rrpb_not_preempted.tml b/ttool/src/test/resources/tmltranslator/simulator/bus_rrpb_not_preempted.tml
index 9b30d97ee1..fe1e4cf636 100644
--- a/ttool/src/test/resources/tmltranslator/simulator/bus_rrpb_not_preempted.tml
+++ b/ttool/src/test/resources/tmltranslator/simulator/bus_rrpb_not_preempted.tml
@@ -19,7 +19,7 @@ TASK Application__Src0
//Local variables
//Behavior
- WRITE Application__c0 5
+ WRITE Application__c0 200
EXECI 400
ENDTASK
@@ -28,7 +28,7 @@ TASK Application__Src1
//Local variables
//Behavior
- WRITE Application__c1 5
+ WRITE Application__c1 10
EXECI 300
ENDTASK
@@ -37,7 +37,7 @@ TASK Application__Tgt0
//Local variables
//Behavior
- READ Application__c0 5
+ READ Application__c0 200
ENDTASK
TASK Application__Tgt1
@@ -45,6 +45,6 @@ TASK Application__Tgt1
//Local variables
//Behavior
- READ Application__c1 5
+ READ Application__c1 10
ENDTASK
diff --git a/ttool/src/test/resources/tmltranslator/simulator/bus_rrpb_preempted.tarchi b/ttool/src/test/resources/tmltranslator/simulator/bus_rrpb_preempted.tarchi
index f0bd87bb45..2daca434d8 100644
--- a/ttool/src/test/resources/tmltranslator/simulator/bus_rrpb_preempted.tarchi
+++ b/ttool/src/test/resources/tmltranslator/simulator/bus_rrpb_preempted.tarchi
@@ -1,5 +1,5 @@
// Master clock frequency - in MHz
-MASTERCLOCKFREQUENCY 200
+MASTERCLOCKFREQUENCY 20
NODE MEMORY Memory0
SET Memory0 byteDataSize 4
@@ -9,6 +9,7 @@ NODE BUS Bus0
SET Bus0 byteDataSize 1
SET Bus0 pipelineSize 1
SET Bus0 arbitration 1
+SET Bus0 sliceTime 1
SET Bus0 clockDivider 1
NODE CPU TGT
diff --git a/ttool/src/test/resources/tmltranslator/simulator/bus_rrpb_preempted.tml b/ttool/src/test/resources/tmltranslator/simulator/bus_rrpb_preempted.tml
index f0d06dee59..fddce899a0 100644
--- a/ttool/src/test/resources/tmltranslator/simulator/bus_rrpb_preempted.tml
+++ b/ttool/src/test/resources/tmltranslator/simulator/bus_rrpb_preempted.tml
@@ -19,7 +19,7 @@ TASK Application__Src0
//Local variables
//Behavior
- WRITE Application__c0 5
+ WRITE Application__c0 200
EXECI 400
ENDTASK
@@ -28,7 +28,7 @@ TASK Application__Src1
//Local variables
//Behavior
- WRITE Application__c1 5
+ WRITE Application__c1 10
EXECI 300
ENDTASK
@@ -37,7 +37,7 @@ TASK Application__Tgt0
//Local variables
//Behavior
- READ Application__c0 5
+ READ Application__c0 200
ENDTASK
TASK Application__Tgt1
@@ -45,6 +45,6 @@ TASK Application__Tgt1
//Local variables
//Behavior
- READ Application__c1 5
+ READ Application__c1 10
ENDTASK
--
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