From b5bd7268364a36a385cbef95e6fdfd363c089d88 Mon Sep 17 00:00:00 2001
From: niusiyuan <siyuan.niu@telecom-paristech.fr>
Date: Mon, 25 Mar 2019 10:13:09 +0100
Subject: [PATCH] simulation is good but runnable time problem
---
.../c++2/src_simulator/app/TMLbrbwChannel.cpp | 1 +
simulators/c++2/src_simulator/arch/Bus.cpp | 2 +-
simulators/c++2/src_simulator/arch/CPU.h | 103 ++++++++++++++++++
.../c++2/src_simulator/arch/MultiCoreCPU.cpp | 22 ++--
.../src_simulator/arch/SchedulableDevice.cpp | 7 +-
.../c++2/src_simulator/sim/Simulator.cpp | 7 +-
6 files changed, 124 insertions(+), 18 deletions(-)
diff --git a/simulators/c++2/src_simulator/app/TMLbrbwChannel.cpp b/simulators/c++2/src_simulator/app/TMLbrbwChannel.cpp
index ee88335d2e..16017733dc 100755
--- a/simulators/c++2/src_simulator/app/TMLbrbwChannel.cpp
+++ b/simulators/c++2/src_simulator/app/TMLbrbwChannel.cpp
@@ -61,6 +61,7 @@ void TMLbrbwChannel::testRead(TMLTransaction* iTrans){
}
void TMLbrbwChannel::write(){
+std::cout<<"write!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!"<<std::endl;
#ifdef LOSS_ENABLED
if (_maxNbOfLosses > _nbOfLosses){
TMLLength aLostBytes = _writeTrans->getVirtualLength() * _lossRate + _lossRemainder;
diff --git a/simulators/c++2/src_simulator/arch/Bus.cpp b/simulators/c++2/src_simulator/arch/Bus.cpp
index 420ba0ffad..1be069c509 100644
--- a/simulators/c++2/src_simulator/arch/Bus.cpp
+++ b/simulators/c++2/src_simulator/arch/Bus.cpp
@@ -91,7 +91,7 @@ void Bus::schedule(){
//Adds the transaction determined by the scheduling algorithm to the internal list of scheduled transactions
bool Bus::addTransaction(TMLTransaction* iTransToBeAdded){
- //std::cout << "Bus add trans " << _nextTransaction << "\n";
+ std::cout << "Bus add trans ####" << _nextTransaction << "\n";
_endSchedule = _nextTransaction->getEndTime();
//std::cout << "set end time to " << _endSchedule << "\n";
//_transactList.push_back(_nextTransaction);
diff --git a/simulators/c++2/src_simulator/arch/CPU.h b/simulators/c++2/src_simulator/arch/CPU.h
index ef8f099df2..a11a799649 100755
--- a/simulators/c++2/src_simulator/arch/CPU.h
+++ b/simulators/c++2/src_simulator/arch/CPU.h
@@ -159,6 +159,109 @@ public:
std::cout << "Current Trans " << _name << ": ";
if (_nextTransaction==0) std::cout << "0\n"; else std::cout << _nextTransaction->toString() << "\n";
}*/
+ void schedule2HTML(std::ofstream& myfile) const {
+ myfile << "<h2><span>Scheduling for device: "<< _name << "</span></h2>" << std::endl;
+
+ if ( _transactList.size() == 0 ) {
+ myfile << "<h4>Device never activated</h4>" << std::endl;
+ }
+ else {
+ myfile << "<table>" << std::endl << "<tr>";
+
+ std::map<TMLTask*, std::string> taskCellClasses;
+ unsigned int nextCellClassIndex = 0;
+ TMLTime aCurrTime = 0;
+
+ for( TransactionList::const_iterator i = _transactList.begin(); i != _transactList.end(); ++i ) {
+ std::cout<<"get transaction core number is: "<<(*i)->getTransactCoreNumber()<<std::endl;
+ std::cout<<"time : "<<_cycleTime<<std::endl;
+ std::cout << "CPU:calcSTL: html of CPU " << _name << ": " << (*i)->toString() << std::endl;
+ //if( (*i)->getTransactCoreNumber() == this->_cycleTime ){
+ TMLTransaction* aCurrTrans = *i;
+ unsigned int aBlanks = aCurrTrans->getStartTime() - aCurrTime;
+
+ if ( aBlanks > 0 ) {
+ writeHTMLColumn( myfile, aBlanks, "not", "idle time" );
+ }
+
+ unsigned int aLength = aCurrTrans->getPenalties();
+
+ if ( aLength != 0 ) {
+ std::ostringstream title;
+ title << "idle:" << aCurrTrans->getIdlePenalty() << " switch:" << aCurrTrans->getTaskSwitchingPenalty();
+ writeHTMLColumn( myfile, aLength, "not", title.str() );
+ }
+
+ aLength = aCurrTrans->getOperationLength();
+
+ // Issue #4
+ TMLTask* task = aCurrTrans->getCommand()->getTask();
+ const std::string cellClass = determineHTMLCellClass( taskCellClasses, task, nextCellClassIndex );
+
+ writeHTMLColumn( myfile, aLength, cellClass, aCurrTrans->toShortString() );
+
+ aCurrTime = aCurrTrans->getEndTime();
+ // }
+ }
+
+
+ myfile << "</tr>" << std::endl << "<tr>";
+
+ for ( unsigned int aLength = 0; aLength < aCurrTime; aLength++ ) {
+ myfile << "<th></th>";
+ }
+
+ myfile << "</tr>" << std::endl << "<tr>";
+
+ for ( unsigned int aLength = 0; aLength <= aCurrTime; aLength += 5 ) {
+ std::ostringstream spanVal;
+ spanVal << aLength;
+ writeHTMLColumn( myfile, 5, "sc", "", spanVal.str(), false );
+ //myfile << "<td colspan=\"5\" class=\"sc\">" << aLength << "</td>";
+ }
+
+ myfile << "</tr>" << std::endl << "</table>" << std::endl << "<table>" << std::endl << "<tr>";
+
+ for( std::map<TMLTask*, std::string>::iterator taskColIt = taskCellClasses.begin(); taskColIt != taskCellClasses.end(); ++taskColIt ) {
+ TMLTask* task = (*taskColIt).first;
+ // Unset the default td max-width of 5px. For some reason setting the max-with on a specific t style does not work
+ myfile << "<td class=\"" << taskCellClasses[ task ] << "\"></td><td style=\"max-width: unset;\">" << task->toString() << "</td><td class=\"space\"></td>";
+ }
+
+ myfile << "</tr>" << std::endl;
+
+ #ifdef ADD_COMMENTS
+ bool aMoreComments = true, aInit = true;
+ Comment* aComment;
+
+ while ( aMoreComments ) {
+ aMoreComments = false;
+ myfile << "<tr>";
+
+ for( std::map<TMLTask*, std::string>::iterator taskColIt = taskCellClasses.begin(); taskColIt != taskCellClasses.end(); ++taskColIt ) {
+ //for(TaskList::const_iterator j=_taskList.begin(); j != _taskList.end(); ++j){
+ TMLTask* task = (*taskColIt).first;
+ std::string aCommentString = task->getNextComment( aInit, aComment );
+
+ if ( aComment == 0 ) {
+ myfile << "<td></td><td></td><td class=\"space\"></td>";
+ }
+ else {
+ replaceAll(aCommentString,"<","<");
+ replaceAll(aCommentString,">",">");
+ aMoreComments = true;
+ myfile << "<td style=\"max-width: unset;\">" << aComment->_time << "</td><td><pre>" << aCommentString << "</pre></td><td class=\"space\"></td>";
+ }
+ }
+
+ aInit = false;
+ myfile << "</tr>" << std::endl;
+ }
+ #endif
+ myfile << "</table>" << std::endl;
+ }
+ }
+
protected:
///List of all tasks running on the CPU
TaskList _taskList;
diff --git a/simulators/c++2/src_simulator/arch/MultiCoreCPU.cpp b/simulators/c++2/src_simulator/arch/MultiCoreCPU.cpp
index 883382c2cf..bb23eff30f 100644
--- a/simulators/c++2/src_simulator/arch/MultiCoreCPU.cpp
+++ b/simulators/c++2/src_simulator/arch/MultiCoreCPU.cpp
@@ -337,17 +337,17 @@ std::cout << "CPU:calcSTL: addtransaction of CPU " << _name << ": " << _nextTran
// unsigned int iCoreNumber=getCoreNumber();
std::cout<<"multicore number "<<coreNumber<<" end schedule "<<_endSchedule<<std::endl;
multiCore[coreNumber]=_endSchedule;
- if (_cycleTime < amountOfCore -1){
- _endSchedule=0;
- _nextTransaction->setTransactCoreNumber(coreNumber);
- ++coreNumber;
- std::cout<<"haha1"<<std::endl;
- }
- else {
- _endSchedule=getMinEndSchedule();
- _nextTransaction->setTransactCoreNumber(coreNumber);
- std::cout<<"haha2"<<std::endl;
- //initCore();
+ std::cout<<"cycle time is "<<_cycleTime<<std::endl;
+ if (coreNumber < amountOfCore -1){
+ _endSchedule=0;
+ _nextTransaction->setTransactCoreNumber(coreNumber);
+ ++coreNumber;
+ std::cout<<"haha1: "<<coreNumber<<std::endl;
+ }else {
+ _endSchedule=getMinEndSchedule();
+ _nextTransaction->setTransactCoreNumber(coreNumber);
+ std::cout<<"haha2: "<<coreNumber<<std::endl;
+ //initCore();
}
std::cout <<"test transaction core number !!!! "<<_nextTransaction->getTransactCoreNumber()<<std::endl;
std::cout << "set end schedule CPU: " << _endSchedule << "\n";
diff --git a/simulators/c++2/src_simulator/arch/SchedulableDevice.cpp b/simulators/c++2/src_simulator/arch/SchedulableDevice.cpp
index 9366796364..3736944243 100644
--- a/simulators/c++2/src_simulator/arch/SchedulableDevice.cpp
+++ b/simulators/c++2/src_simulator/arch/SchedulableDevice.cpp
@@ -184,8 +184,7 @@ std::string SchedulableDevice::determineHTMLCellClass( std::map<TMLTask*, std::
return taskColors[ task ];
}
-void SchedulableDevice::schedule2HTML(std::ofstream& myfile) const {
-
+void SchedulableDevice::schedule2HTML(std::ofstream& myfile) const {
myfile << "<h2><span>Scheduling for device: "<< _name << "</span></h2>" << std::endl;
if ( _transactList.size() == 0 ) {
@@ -202,7 +201,7 @@ void SchedulableDevice::schedule2HTML(std::ofstream& myfile) const {
std::cout<<"get transaction core number is: "<<(*i)->getTransactCoreNumber()<<std::endl;
std::cout<<"time : "<<_cycleTime<<std::endl;
std::cout << "CPU:calcSTL: html of CPU " << _name << ": " << (*i)->toString() << std::endl;
- if( (*i)->getTransactCoreNumber() == this->_cycleTime ){
+ //if( (*i)->getTransactCoreNumber() == this->_cycleTime ){
TMLTransaction* aCurrTrans = *i;
unsigned int aBlanks = aCurrTrans->getStartTime() - aCurrTime;
@@ -227,7 +226,7 @@ void SchedulableDevice::schedule2HTML(std::ofstream& myfile) const {
writeHTMLColumn( myfile, aLength, cellClass, aCurrTrans->toShortString() );
aCurrTime = aCurrTrans->getEndTime();
- }
+ // }
}
diff --git a/simulators/c++2/src_simulator/sim/Simulator.cpp b/simulators/c++2/src_simulator/sim/Simulator.cpp
index 177b6971c0..7d253ae9c2 100644
--- a/simulators/c++2/src_simulator/sim/Simulator.cpp
+++ b/simulators/c++2/src_simulator/sim/Simulator.cpp
@@ -289,7 +289,7 @@ void Simulator::latencies2XML(std::ostringstream& glob, int id1, int id2) {
}
void Simulator::schedule2HTML(std::string& iTraceFileName) const {
-std::cout<<"schedule2HTML--------------------------------------"<<std::endl;
+std::cout<<"schedule2HTML--------------------------------------******************"<<std::endl;
struct timeval aBegin,aEnd;
gettimeofday(&aBegin,NULL);
@@ -522,8 +522,11 @@ bool Simulator::simulate(TMLTransaction*& oLastTrans){
std::cout << "cpuLET= " << cpuLET->toString() << std::endl;
std::cout << "kernel:simulate:cpuLET printed" << std::endl;
#endif
+ std::cout<<"in simulator begin addTransaction "<<std::endl;
bool x = cpuLET->addTransaction(0);
- cpuLET->setCycleTime(0);
+ // cpuLET->setCycleTime(0);
+ std::cout<<"in simulator end addTransactin "<<std::endl;
+
//std::cout << "kernel:simulate: x=" << x << std::endl;
#ifdef DEBUG_KERNEL
std::cout << "kernel:simulate: AFTER add trans: " << x << std::endl;
--
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