Commit cae24b3c authored by Ludovic Apvrille's avatar Ludovic Apvrille
Browse files

Merge branch 'master' of gitlab.enst.fr:mbe-tools/TTool

parents dcb951b1 4aa402ed
......@@ -73,10 +73,14 @@ MEMORY
mem_rom (RXAL): ORIGIN = CONFIG_ROM_ADDR, LENGTH = CONFIG_ROM_SIZE
#endif
mem_ram (RWAL): ORIGIN = CONFIG_RAM_ADDR, LENGTH = CONFIG_RAM_SIZE
//ajoute DG provisiore
//mwmr_ram (RWAL): ORIGIN = 0xA0200000, LENGTH = 0x00001000
//mwmrd_ram (RWAL): ORIGIN = 0xB0200000, LENGTH = 0x00003000
//19.05. une seule RAMLOCKS en cas de besoin (actually unused)
//DG 7.9.
#if defined(MWMR_RAM0_NAME)
mwmr_ram0 (RWAL): ORIGIN = 0xA0200000, LENGTH = 0x00001000
#endif
#if defined(MWMR_RAM1_NAME)
mwmr_ram1 (RWAL): ORIGIN = 0xA1200000, LENGTH = 0x00001000
#endif
vci_locks (RWAL): ORIGIN = 0xC0200000, LENGTH = 0x100
//ajout CD
......
Module('caba:MyHWA0',
classname = 'dsx::caba::MyHWA0',
header_files = [
"my_hwa0.h",
],
interface_files = [
],
implementation_files = [
"my_hwa0.cpp",
],
ports = [
],
uses = [
Uses('caba:fifo_virtual_copro_wrapper'),
],
instance_parameters = [
],
tmpl_parameters = [
],
extensions = [
],
)
#ifndef _HWA0_H
#define _HWA0_H
#include <systemc>
#include "fifo_virtual_copro_wrapper.h"
namespace dsx { namespace caba {
class MyHWA0
: public dsx::caba::FifoVirtualCoprocessorWrapper
{
public:
~MyHWA0();
MyHWA0(sc_core::sc_module_name insname);
private:
void * task_func(); // Task code
};
}}
#endif
namespace dsx { namespace caba {
#define tmpl(...) __VA_ARGS__ MyHWA0
tmpl(/**/)::~MyHWA0()
{
}
//intArray(1,1) there is one element (here an integer) of size 4 OCTETs/Quentin: attention cela a change c'est un MOT dans la version VM
tmpl(/**/)::MyHWA0(sc_core::sc_module_name insname)
:dsx::caba::FifoVirtualCoprocessorWrapper(insname, stringArray("output", NULL), intArray(1,4), stringArray(NULL), NULL)
{
}
tmpl(void *)::task_func() {
struct mwmr_s *output;
// mwmr_t output = SRL_GET_MWMR(output);
uint32_t data;
while (true) {
for (int32_t i = 0; i < 8; i++) {
out=i;
mwmr_write(output, &data, 4; // Write integers 0 to 7 to output
}
}
}
}}
Module('caba:MyHWA0',
classname = 'dsx::caba::MyHWA0',
header_files = [
"my_hwa0.h",
],
interface_files = [
],
implementation_files = [
"my_hwa0.cpp",
],
ports = [
],
uses = [
Uses('caba:fifo_virtual_copro_wrapper'),
],
instance_parameters = [
],
tmpl_parameters = [
],
extensions = [
],
)
Module('caba:MyHWA1',
classname = 'dsx::caba::MyHWA1',
header_files = [
"my_hwa1.h",
],
interface_files = [
],
implementation_files = [
"my_hwa1.cpp",
],
ports = [
],
uses = [
Uses('caba:fifo_virtual_copro_wrapper'),
],
instance_parameters = [
],
tmpl_parameters = [
],
extensions = [
],
)
#ifndef _HWA0_H
#define _HWA0_H
#include <systemc>
#include "fifo_virtual_copro_wrapper.h"
namespace dsx { namespace caba {
class MyHWA0
: public dsx::caba::FifoVirtualCoprocessorWrapper
{
public:
~MyHWA0();
MyHWA0(sc_core::sc_module_name insname);
private:
void * task_func(); // Task code
};
}}
#endif
#ifndef _HWA1_H
#define _HWA1_H
#include <systemc>
#include "fifo_virtual_copro_wrapper.h"
namespace dsx { namespace caba {
class MyHWA1
: public dsx::caba::FifoVirtualCoprocessorWrapper
{
public:
~MyHWA1();
MyHWA1(sc_core::sc_module_name insname);
private:
void * task_func(); // Task code
};
}}
#endif
namespace dsx { namespace caba {
#define tmpl(...) __VA_ARGS__ MyHWA0
tmpl(/**/)::~MyHWA0()
{
}
//intArray(1,1) there is one element (here an integer) of size 4 OCTETs/Quentin: attention cela a change c'est un MOT dans la version VM
tmpl(/**/)::MyHWA0(sc_core::sc_module_name insname)
:dsx::caba::FifoVirtualCoprocessorWrapper(insname, stringArray("output", NULL), intArray(1,4), stringArray(NULL), NULL)
{
}
tmpl(void *)::task_func() {
struct mwmr_s *output;
// mwmr_t output = SRL_GET_MWMR(output);
uint32_t data;
while (true) {
for (int32_t i = 0; i < 8; i++) {
out=i;
mwmr_write(output, &data, 4; // Write integers 0 to 7 to output
}
}
}
}}
namespace dsx { namespace caba {
#define tmpl(...) __VA_ARGS__ MyHWA1
tmpl(/**/)::~MyHWA1()
{
}
//intArray(1,1) there is one element (here an integer) of size 4 OCTETs/Quentin: attention cela a change c'est un MOT dans la version VM
tmpl(/**/)::MyHWA1(sc_core::sc_module_name insname)
:dsx::caba::FifoVirtualCoprocessorWrapper(insname, stringArray(NULL), NULL, stringArray("input", NULL), intArray(1,4))
{
}
tmpl(void *)::task_func() {
struct mwmr_s *input;
uint32_t data;
while (true) {
for (int32_t i = 0; i < 8; i++) {
mwmr_read(input, &data, 1); // read 8 integers wich have been modified by the intermediate software task
}
}
}
}}
12340
\ No newline at end of file
12357
\ No newline at end of file
......@@ -133,12 +133,11 @@ public class AvatarBlock extends AvatarElement implements AvatarStateMachineOwne
}
public AvatarSignal getSignalByName(String _name) {
for(AvatarSignal sig: signals) {
System.out.println("finding " +sig.getName() + " " + _name);
if (sig.getName().compareTo(_name) == 0) {
return sig;
}
}
for(AvatarSignal sig: signals) {
if (sig.getName().compareTo(_name) == 0) {
return sig;
}
}
if (father != null) {
return father.getSignalByName(_name);
......
......@@ -53,7 +53,7 @@ public class AvatarCoproMWMR extends AvatarComponent{
private int tgtid ;
private int plaps ;
private int fifoToCoprocDepth;
private int fifoFromCoproDepth;
private int fifoFromCoprocDepth;
private int nToCopro;
private int nFromCopro;
private int nConfig;
......@@ -63,14 +63,14 @@ public class AvatarCoproMWMR extends AvatarComponent{
private AvatarConnectingPoint[] connectingsPoints;
private int nbConnectingPoint = 16 ;
public AvatarCoproMWMR(String _coprocName,int srcid, int _srcid, int _tgtid, int _plaps, int _fifoToCoprocDepth,int _fifoFromCoproDepth, int _nToCopro, int _nFromCopro, int _nConfig, int _nStatus, boolean _useLLSC)
public AvatarCoproMWMR(String _coprocName,int srcid, int _srcid, int _tgtid, int _plaps, int _fifoToCoprocDepth,int _fifoFromCoprocDepth, int _nToCopro, int _nFromCopro, int _nConfig, int _nStatus, boolean _useLLSC)
{
coprocName = _coprocName;
srcid = _srcid;
tgtid = _tgtid;
plaps = _plaps ;
fifoToCoprocDepth = _fifoToCoprocDepth;
fifoFromCoproDepth = _fifoFromCoproDepth;
fifoFromCoprocDepth = _fifoFromCoprocDepth;
nToCopro = _nToCopro;
nFromCopro = _nFromCopro;
nConfig = _nConfig;
......@@ -109,10 +109,14 @@ public class AvatarCoproMWMR extends AvatarComponent{
return plaps;
}
public int getFifoToCoProcDepth(){
public int getFifoToCoprocDepth(){
return fifoToCoprocDepth;
}
public int getFifoFromCoprocDepth(){
return fifoFromCoprocDepth;
}
public int getNToCopro(){
return nToCopro;
}
......
......@@ -52,8 +52,8 @@ package ddtranslatorSoclib;
public class AvatarTask extends AvatarMappedObject{
private AvatarCPU avatarCPUReference;
private String taskName ;
private String referenceTaskName;
private String taskName ;
private String referenceTaskName;
public AvatarTask(String _taskName , String _referenceTaskName, AvatarCPU _avatarCPUReference ){
......
......@@ -49,9 +49,8 @@ package ddtranslatorSoclib;
import java.util.LinkedList;
import java.util.List;
import ui.tmldd.TMLArchiHWANode;//DG 23.08.
public class AvatarddSpecification{
private List<AvatarComponent> components;
private List<AvatarConnector> connectors;
private List<AvatarMappedObject> mappedObjects;
......@@ -195,7 +194,7 @@ There always is a RAM0, a TTY and an interconnect (Bus or VGMN or crossbar) othe
return crossbars;
}
/* public LinkedList<AvatarBridge> getAllBridge(){
/* public LinkedList<AvatarBridge> getAllBridge(){
LinkedList<AvatarBridge> bridges = new LinkedList<AvatarBridge>();
for (AvatarComponent bridge : components )
{
......@@ -212,16 +211,37 @@ There always is a RAM0, a TTY and an interconnect (Bus or VGMN or crossbar) othe
return getAllCrossbar().size();
}
public List<AvatarCoproMWMR> getAllCoproMWMR(){
/* DG 23.08. les hardware accelerators proviennent en fait de la specification DIPLODOCUS */
// copro= new AvatarCoproMWMR("test",0,0,0,10,8,8,1,1,1,1,false);
public List<AvatarCoproMWMR> getAllCoproMWMR(){
List<AvatarCoproMWMR> copros = new LinkedList<AvatarCoproMWMR>();
for (AvatarComponent copro : components )
{
if (copro instanceof AvatarCoproMWMR)
copros.add((AvatarCoproMWMR)copro);
if (copro instanceof AvatarCoproMWMR){
System.out.println("Coproc added to specification");
copros.add((AvatarCoproMWMR)copro);
}
}
return copros;
}
}
/* to do, actuellement c'est un hwa generique */
/* the hardware accelerators must be taken from DIPLODOCUS specification */
/* public List<DiploHWA> getAllHWA(){
List<DiploHWA> hwas = new LinkedList<DiploHWA>();
for (DiploComponent hwa : diplocomponents )
{
if (hwa instanceof DiploHWA){
System.out.println("Hardware accelerator added to specification");
hwas.add((DiploHWA)hwa);
}
}
return hwas;
}*/
public int getNbCPU(){
return (getAllCPU()).size();
......
......@@ -1033,6 +1033,26 @@ public class TasksAndMainGenerator {
mainFile.appendToMainCode("/* Activating randomness */" + CR);
mainFile.appendToMainCode("initRandom();" + CR);
/* DG 7.9.2017 additions for use of hardware MWMR controller */
/*void mwmr_hw_init( void *coproc, enum SoclibMwmrWay way,
size_t no, const struct mwmr_s* mwmr );*/
/*uint32_t *fifo_data_in = (uint32_t*)(base(MWMRd)+0x000); //0x20200000;*/
/* uint32_t *lock_in = (uint32_t*)(base(LOCKS)+0x00);*/
/* mwmr_t *p_mwmr_in = (mwmr_t*)(base(MWMRd)+0x1000);*/
/*mwmr_initialize_pointer(p_mwmr_in, WIDTH, DEPTH, fifo_data_in, lock_in );*/
/* mwmr_hw_init(base(MWMR), MWMR_TO_COPROC, 0 , p_mwmr_in);*/
/*for all coproc
uint32_t *fifo = (uint32_t*) + i*4096;*/
/* end ajoute 7.9. */
mainFile.appendToMainCode("/* Initializing the main mutex */" + CR);
mainFile.appendToMainCode("if (pthread_mutex_init(&__mainMutex, NULL) < 0) { exit(-1);}" + CR + CR);
......
......@@ -114,22 +114,25 @@ public class Declaration {
declaration += "caba::VciFdtRom<vci_param> vcifdtrom(\"vci_fdt_rom\", IntTab(0,6), maptab);" + CR;
}
if(nb_clusters==0){
declaration += "caba::VciLocks<vci_param> vcilocks(\"vcilocks\", IntTab("+(TopCellGenerator.avatardd.getNb_target()+3)+"), maptab);" + CR;
}
else{
declaration += "caba::VciLocks<vci_param> vcilocks(\"vcilocks\", IntTab(0,8), maptab);" + CR;
}
int last_tty=0;
if(nb_clusters==0){
int i=0;
for (AvatarTTY tty : TopCellGenerator.avatardd.getAllTTY()){
declaration += "caba::VciMultiTty<vci_param> " + tty.getTTYName()+ "(\"" + tty.getTTYName()+ "\", IntTab(" + tty.getNo_target()+ "), maptab, \"vci_multi_tty"+i+"\", NULL);"+ CR;
i++;
last_tty=tty.getNo_target()+1;
}
//target address depends on number of TTYs and RAMs
if(nb_clusters==0){
// declaration += "caba::VciLocks<vci_param> vcilocks(\"vcilocks\", IntTab("+(TopCellGenerator.avatardd.getNb_target()+3)+"), maptab);" + CR;
declaration += "caba::VciLocks<vci_param> vcilocks(\"vcilocks\", IntTab("+(last_tty+3)+"), maptab);" + CR;
}
else{
declaration += "caba::VciLocks<vci_param> vcilocks(\"vcilocks\", IntTab(0,8), maptab);" + CR;
}
for (AvatarRAM ram : TopCellGenerator.avatardd.getAllRAM())
if(ram.getIndex()==0){
declaration += "soclib::caba::VciRam<vci_param>" + ram.getMemoryName()+ "(\"" + ram.getMemoryName()+ "\"" + ", IntTab(2), maptab);" + CR;
......@@ -150,9 +153,35 @@ public class Declaration {
+ ram.getNo_target() + "), maptab);" + CR2;
}
if(nb_clusters==0){
declaration += "caba::VciFdAccess<vci_param> vcifd(\"vcifd\", maptab, IntTab(cpus.size()+1), IntTab("+(TopCellGenerator.avatardd.getNb_target())+"));" + CR;
/*declaration += "caba::VciFdAccess<vci_param> vcifd(\"vcifd\", maptab, IntTab(cpus.size()+1), IntTab("+(TopCellGenerator.avatardd.getNb_target())+"));" + CR;
declaration += "caba::VciEthernet<vci_param> vcieth(\"vcieth\", maptab, IntTab(cpus.size()+2), IntTab("+(TopCellGenerator.avatardd.getNb_target()+1)+"), \"soclib0\");" + CR;
declaration += "caba::VciBlockDevice<vci_param> vcibd(\"vcibd\", maptab, IntTab(cpus.size()), IntTab("+(TopCellGenerator.avatardd.getNb_target()+2)+"),\"block0.iso\", 2048);" + CR;
declaration += "caba::VciBlockDevice<vci_param> vcibd(\"vcibd\", maptab, IntTab(cpus.size()), IntTab("+(TopCellGenerator.avatardd.getNb_target()+2)+"),\"block0.iso\", 2048);" + CR;*/
declaration += "caba::VciFdAccess<vci_param> vcifd(\"vcifd\", maptab, IntTab(cpus.size()+1), IntTab("+last_tty +"));" + CR;
declaration += "caba::VciEthernet<vci_param> vcieth(\"vcieth\", maptab, IntTab(cpus.size()+2), IntTab("+(last_tty +1)+"), \"soclib0\");" + CR;
declaration += "caba::VciBlockDevice<vci_param> vcibd(\"vcibd\", maptab, IntTab(cpus.size()), IntTab("+(last_tty +2)+"),\"block0.iso\", 2048);" + CR;
//only non-clustered version
int hwa_no=0;
//int target_no = TopCellGenerator.avatardd.getNb_target();
int target_no = (last_tty +4);//DG 5.9.
int init_no = TopCellGenerator.avatardd.getNb_init();
for (AvatarCoproMWMR copro : TopCellGenerator.avatardd.getAllCoproMWMR()){
// declaration += "caba::VciMwmrController<vci_param> " + copro.getCoprocName()+ "(\"" + copro.getCoprocName()+ "\", maptab, IntTab("+copro.getSrcid() + "), IntTab("+copro.getTgtid() + "),copro.getPlaps(),copro.getFifoToCoProcDepth(),copro.getNToCopro(),copro.getNFromCopro(),copro.getNConfig(),copro.getNStatus(), copro.getUseLLSC());"+ CR;
declaration += "caba::VciMwmrController<vci_param> " + copro.getCoprocName()+ "(\"" + copro.getCoprocName()+ "\", maptab, IntTab("+(init_no-1)+"), IntTab("+target_no+ "),"+copro.getPlaps()+","+copro.getFifoToCoprocDepth()+","+copro.getFifoFromCoprocDepth()+","+copro.getNToCopro()+","+copro.getNFromCopro()+","+copro.getNConfig()+","+copro.getNStatus()+","+ copro.getUseLLSC()+");"+ CR2;
//one virtual component for each hardware accellerator, info from diplodocus (not yet implemented)
//DG 28.08.
// declaration += "soclib::caba::FifoVirtualCoprocessorWrapper hwa"+hwa_no+"(\"hwa"+hwa_no+"\",1,1,1,1);"+ CR2;
declaration += "dsx::caba::MyHWA"+hwa_no+" hwa"+hwa_no+"(\"hwa"+hwa_no+"\");"+ CR2;
target_no++;
init_no++;
hwa_no++;
}
}else{
declaration += "caba::VciFdAccess<vci_param> vcifd(\"vcifd\", maptab, IntTab(0,cpus.size()+1), IntTab(0,7));" + CR;
declaration += "caba::VciEthernet<vci_param> vcieth(\"vcieth\", maptab, IntTab(0,cpus.size()+2), IntTab(0,8), \"soclib0\");" + CR;
......@@ -160,12 +189,15 @@ public class Declaration {
}
if(nb_clusters==0){
for (AvatarBus bus : TopCellGenerator.avatardd.getAllBus()) {
System.out.println("initiators: "+TopCellGenerator.avatardd.getNb_init());
System.out.println("targets: "+TopCellGenerator.avatardd.getNb_target());
//declaration += "soclib::caba::VciVgsb<vci_param> vgsb(\"" + bus.getBusName() + "\"" + " , maptab, cpus.size()+3," + (TopCellGenerator.avatardd.getNb_target()+4)+");" + CR2;
declaration += "soclib::caba::VciVgsb<vci_param> vgsb(\"" + bus.getBusName() + "\"" + " , maptab, cpus.size()+3," + (TopCellGenerator.avatardd.getNb_target()+4)+ ");" + CR2;
// declaration += "soclib::caba::VciVgsb<vci_param> vgsb(\"" + bus.getBusName() + "\"" + " , maptab, cpus.size()+3," + (TopCellGenerator.avatardd.getNb_target()+4)+ ");" + CR2;
declaration += "soclib::caba::VciVgsb<vci_param> vgsb(\"" + bus.getBusName() + "\"" + " , maptab,"+(3+TopCellGenerator.avatardd.getNb_init())+"," + (TopCellGenerator.avatardd.getNb_target()+4)+ ");" + CR2;//DG 28.08.
int i=0;
//if BUS was not last in input file, update here
......@@ -185,7 +217,10 @@ if(nb_clusters==0){
vgmn.setFifoDepth(8); //default value; must be > 2
declaration += "soclib::caba::VciVgmn<vci_param> vgmn(\"" + vgmn.getVgmnName() + "\"" + " , maptab, cpus.size()+3," + (TopCellGenerator.avatardd.getNb_target()+4)+ "," + vgmn.getMinLatency() + "," + vgmn.getFifoDepth() + ");" + CR2;
// declaration += "soclib::caba::VciVgmn<vci_param> vgmn(\"" + vgmn.getVgmnName() + "\"" + " , maptab, cpus.size()+3," + (TopCellGenerator.avatardd.getNb_target()+4)+ "," + vgmn.getMinLatency() + "," + vgmn.getFifoDepth() + ");" + CR2;
// declaration += "soclib::caba::VciVgmn<vci_param> vgmn(\"" + vgmn.getVgmnName() + "\"" + " , maptab, " +(3+TopCellGenerator.avatardd.getNb_init())+"," + (TopCellGenerator.avatardd.getNb_target()+4)+ "," + vgmn.getMinLatency() + "," + vgmn.getFifoDepth() + ");" + CR2;//DG 28.08.
declaration += "soclib::caba::VciVgmn<vci_param> vgmn(\"" + vgmn.getVgmnName() + "\"" + " , maptab, " +(3+TopCellGenerator.avatardd.getNb_init())+"," + (TopCellGenerator.avatardd.getNb_target()+3)+ "," + vgmn.getMinLatency() + "," + vgmn.getFifoDepth() + ");" + CR2;//DG 5.9.
// declaration += "soclib::caba::VciVgmn<vci_param> vgmn(\"" + vgmn.getVgmnName() + "\"" + " , maptab, cpus.size()+3," + (TopCellGenerator.avatardd.getNbRAM()+TopCellGenerator.avatardd.getNbTTY()+4)+ "," + vgmn.getMinLatency() + "," + vgmn.getFifoDepth() + ");" + CR2;
......@@ -212,11 +247,7 @@ if(nb_clusters==0){
const bool use_llsc );
*/
//only non-clustered version
for (AvatarCoproMWMR copro : TopCellGenerator.avatardd.getAllCoproMWMR()){
declaration += "caba::VciMwmrController<vci_param> " + copro.getCoprocName()+ "(\"" + copro.getCoprocName()+ "\", maptab, IntTab("+copro.getSrcid() + "), IntTab("+copro.getTgtid() + "),copro.getPlaps(),copro.getFifoToCoProcDepth(),copro.getNToCopro(),copro.getNFromCopro(),copro.getNConfig(),copro.getNStatus(), copro.getUseLLSC());"+ CR;
}
}
else {
......@@ -266,7 +297,6 @@ else {
declaration += "soclib::caba::VciLocalCrossbar<vci_param> crossbar"+crossbar.getClusterIndex()+"(\"" + crossbar.getCrossbarName() + "\"" + " , maptab, IntTab("+ crossbar.getClusterIndex()+"),IntTab("+crossbar.getClusterIndex()+"), "+crossbar.getNbOfAttachedInitiators()+", "+crossbar.getNbOfAttachedTargets()+");" + CR2;
//if CROSSBAR was not last in input file, update here
crossbar.setNbOfAttachedInitiators(TopCellGenerator.avatardd.getNb_init());
crossbar.setNbOfAttachedTargets(TopCellGenerator.avatardd.getNb_target());
......
......@@ -174,6 +174,16 @@ public class Deployinfo {
i++;
}
//Calculate Adresses of MWMR segments, one for each hardware accellerator
i=0;
for (AvatarCoproMWMR copro : TopCellGenerator.avatardd.getAllCoproMWMR()) {
deployinfo = deployinfo + "#define MWMR_RAM" + i + "_NAME mwmr_ram" + i + CR;
deployinfo = deployinfo + "#define MWMR_RAM" + i + "_ADDR 0xA02" + Integer.toHexString(i*4096) + CR;
deployinfo = deployinfo + "#define MWMR_RAM" + i + "_SIZE 0x1000"+ CR;
i++;
}
return deployinfo;
}
......