TTool issueshttps://gitlab.telecom-paris.fr/mbe-tools/TTool/-/issues2022-03-09T16:38:45Zhttps://gitlab.telecom-paris.fr/mbe-tools/TTool/-/issues/321Use of "min" and "max" expressions in action states, in activity diagrams2022-03-09T16:38:45ZBastien SultanUse of "min" and "max" expressions in action states, in activity diagramsHello,
In Diplodocus modeling, the syntax analyzer does not raise exceptions when the expressions "min" and "max" are used in an action state in activity diagrams, even if they are not defined. However, the code generation fails (see "M...Hello,
In Diplodocus modeling, the syntax analyzer does not raise exceptions when the expressions "min" and "max" are used in an action state in activity diagrams, even if they are not defined. However, the code generation fails (see "Mapping" tab in the model in attachment, then click on "Syntax analysis" and "Generate code for simulation").
Furthermore, if :
**(1)** these "min" and "max" expressions are used in an action state inside a loop
**and**
**(2)** at least one of their arguments is the variable modified by the action state (e.g., "n = max(2,n)" or "n = min(4,n+1)"),
the code generation is performed (see "Mapping_withLoop" tab in the model in attachment, then click on "Syntax analysis" and "Generate code for simulation"). According to the "Task variables" tab in the simulator, these "min" and "max" expressions behave as expected, respectively returning the minimum and maximum values between their arguments.
Cheers,
Bastien
[bugMinMax.xml](/uploads/0f0c45ff7d022bc92cf3a58b2a3a533f/bugMinMax.xml)https://gitlab.telecom-paris.fr/mbe-tools/TTool/-/issues/250Emptying simulation transactions during simulation2020-03-19T14:50:09ZLudovic ApvrilleEmptying simulation transactions during simulationIt would be great if we could forget about all the past transactions in the simulator, e.g. using a commandIt would be great if we could forget about all the past transactions in the simulator, e.g. using a commandLe Van TruongLe Van Truonghttps://gitlab.telecom-paris.fr/mbe-tools/TTool/-/issues/251Adding a getAllTransactionsOfTask <String taskName>2020-03-03T13:10:06ZLudovic ApvrilleAdding a getAllTransactionsOfTask <String taskName>We need this function in TTool simulator.
- Adding this function in the C++ simulator
- Update the GUI including the helpWe need this function in TTool simulator.
- Adding this function in the C++ simulator
- Update the GUI including the helpLe Van TruongLe Van Truonghttps://gitlab.telecom-paris.fr/mbe-tools/TTool/-/issues/249Enhancing HTML traces output by the DIPLODOCUS simulator2020-02-24T09:29:53ZLudovic ApvrilleEnhancing HTML traces output by the DIPLODOCUS simulatorCurrently, HTML traces are too long when the simulation lasts long, even if there are not many transactions.
Thu, that would be great to find a way to make simulation traces to be displayed by browser when the number of transactions is l...Currently, HTML traces are too long when the simulation lasts long, even if there are not many transactions.
Thu, that would be great to find a way to make simulation traces to be displayed by browser when the number of transactions is low, even if the overall simulation contains many cycles.Le Van TruongLe Van Truonghttps://gitlab.telecom-paris.fr/mbe-tools/TTool/-/issues/211Daemon tasks in automated transformatio n2019-07-23T17:14:02ZLudovic ApvrilleDaemon tasks in automated transformatio nNoC, Communication Patterns, fork/join.NoC, Communication Patterns, fork/join.Ludovic ApvrilleLudovic Apvrillehttps://gitlab.telecom-paris.fr/mbe-tools/TTool/-/issues/191Breakpoints after select event are not taken into account2019-04-30T14:54:58ZLudovic ApvrilleBreakpoints after select event are not taken into accountLudovic ApvrilleLudovic Apvrillehttps://gitlab.telecom-paris.fr/mbe-tools/TTool/-/issues/185Problem with parentheses in math operations2019-03-20T10:22:15ZDominique BlouinProblem with parentheses in math operationsDear Ludovic,
I found the following problem:
Having myself made a mistake, I investigated why the result of my operation was wrong and I believe that there is nonetheless also a bug in TTool with parentheses not being respected when do...Dear Ludovic,
I found the following problem:
Having myself made a mistake, I investigated why the result of my operation was wrong and I believe that there is nonetheless also a bug in TTool with parentheses not being respected when doing calculations.
This is the original operation with values I was trying to compute. (My mistake being (dataRate/1000) = 0 since dataRate < 1000.)
enoughTime = (timeLeft - ((APDU.size + MPDUHeaderSize + PPDUHeaderSize)/(dataRate/1000)))
enoughTime 881
timeLeft 900
APDU.size 50
MPDUHeaderSize 25
PPDUHeaderSize 6
dataRate 250
My first clue that something did not add up: I was getting test = 81 but if I tried to divide by zero I should get 2147483647 (done in another test).
test = ((APDU.size + MPDUHeaderSize + PPDUHeaderSize)/(dataRate/1000)))
test 81
Thefore, I investigated previous code I had written that strangely worked when it should not have if parentheses were respected.
timeSending = PPDU.size/(dataRate/1000)
PPDU.size 81
dataRate 250
timeSending 324
I also tried the following which clearly indicates it is not working.
enoughTime = (timeLeft - (1000*(APDU.size + MPDUHeaderSize + PPDUHeaderSize)/dataRate))
enoughTime -49131
It seems that it did 900 - (1000*50 + 25 + 6) (ignoring /datarate)
Sincerely,
Theau Heral
<br/> Submitted by external user theau.heral@student.isae-supaero.frhttps://gitlab.telecom-paris.fr/mbe-tools/TTool/-/issues/9Crash of simulator2019-02-20T08:59:35ZLudovic ApvrilleCrash of simulatorWhen using more than one core in a CPU, the simulator crashes.
For example, with the SmartCard system, mapping2. If you put 2 cores to CPU0, then, the simulation crashes.When using more than one core in a CPU, the simulator crashes.
For example, with the SmartCard system, mapping2. If you put 2 cores to CPU0, then, the simulation crashes.Dominique BlouinDominique Blouinhttps://gitlab.telecom-paris.fr/mbe-tools/TTool/-/issues/4Diplodocus Simulator HTML Scheduling Output Missing Style2019-02-20T08:59:34ZLetitia LiDiplodocus Simulator HTML Scheduling Output Missing StyleWhen running the simulator in command line run.x -o -ohtml output.html, the resulting html file is not very helpful. This appears for multiple models that I have tested and there is no such problem when saving a trace from interactive si...When running the simulator in command line run.x -o -ohtml output.html, the resulting html file is not very helpful. This appears for multiple models that I have tested and there is no such problem when saving a trace from interactive simulation. The output txt file is more detailed.
[output.txt](/uploads/6fe06a4b9d58dc7a06910000e4a2202b/output.txt)
[output.html](/uploads/a123e2390d9bedcdb13be78c064e7c70/output.html)Letitia LiLetitia Lihttps://gitlab.telecom-paris.fr/mbe-tools/TTool/-/issues/170Starting UPPAAL verifier2019-01-16T16:23:08ZMaysam ZoorStarting UPPAAL verifierThe verifier of UPPAAL could not be started.
using "=="instead of "=" to assign a variable while inserting a code in a block is not reported as bug in checking syntax while the Uppaal verfier could not start due to this error [test.xml]...The verifier of UPPAAL could not be started.
using "=="instead of "=" to assign a variable while inserting a code in a block is not reported as bug in checking syntax while the Uppaal verfier could not start due to this error [test.xml](/uploads/5e29be7e6eaedb3baf6e9081617e1910/test.xml)https://gitlab.telecom-paris.fr/mbe-tools/TTool/-/issues/132Incorrect scenario drawing from simulation trace2018-07-02T15:03:18ZLudovic ApvrilleIncorrect scenario drawing from simulation traceWhen simulating the beginning of the smartcard, events are badly connected, e.g. the answer_to_reset message, as shown on the included capture.![Screen_Shot_2018-05-25_at_15.26.50](/uploads/e0ec62d1f23cb2873d8f4190a0e6a150/Screen_Shot_20...When simulating the beginning of the smartcard, events are badly connected, e.g. the answer_to_reset message, as shown on the included capture.![Screen_Shot_2018-05-25_at_15.26.50](/uploads/e0ec62d1f23cb2873d8f4190a0e6a150/Screen_Shot_2018-05-25_at_15.26.50.png)Letitia LiLetitia Lihttps://gitlab.telecom-paris.fr/mbe-tools/TTool/-/issues/136Fork of an event2018-06-14T15:52:45ZMatteo Bertolinomatteo.bertolino@telecom-paristech.frFork of an eventForking a control event does nothing. I have to use multiple events with multiple ports etc.
No problem for data and channels. Is it a bug?Forking a control event does nothing. I have to use multiple events with multiple ports etc.
No problem for data and channels. Is it a bug?Ludovic ApvrilleLudovic Apvrillehttps://gitlab.telecom-paris.fr/mbe-tools/TTool/-/issues/134Error myutil.FileException2018-06-04T11:56:08ZMatteo Bertolinomatteo.bertolino@telecom-paristech.frError myutil.FileExceptionWhen I try to generate code for simulation for the model attached, mapping model: "IPMappingFinal_Ad" (the only one with no errors and no warning), I obtain:
**** HANDLING CPs:
**** Remove forks and joins
SystemC code generated in.....When I try to generate code for simulation for the model attached, mapping model: "IPMappingFinal_Ad" (the only one with no errors and no warning), I obtain:
**** HANDLING CPs:
**** Remove forks and joins
SystemC code generated in../simulators/c++2/
Diplodocus simulation code to be generated in dir:../simulators/c++2/
Exception file creation for simulator: Source '../simulators/c++2/Makefile' and destination '../simulators/c++2/Makefile' are the same
Could not generate simulator code!
myutil.FileException: Operation on file could not be performed: Pb when saving file
at myutil.FileUtils.saveFile(FileUtils.java:266)
at myutil.FileUtils.saveFile(FileUtils.java:250)
at tmltranslator.tomappingsystemc2.DiploSimulatorCodeGenerator.saveFile(DiploSimulatorCodeGenerator.java:131)
at ui.window.JDialogSystemCGeneration.generateCode(JDialogSystemCGeneration.java:778)
at ui.window.JDialogSystemCGeneration.run(JDialogSystemCGeneration.java:647)
at java.lang.Thread.run(Thread.java:748)
IMPORTANT update: I obtain the same error even if I try to simulate the application not mapped (RX5GphyApp_Embb).
My config.xml is attached too[RX5GPhy.xml](/uploads/cc1f31bf3a48a56d7ca0e90e6a70b8f0/RX5GPhy.xml)[config.xml](/uploads/46c648035d3c2d49fbdd5e9d2d84b21a/config.xml)Ludovic ApvrilleLudovic Apvrillehttps://gitlab.telecom-paris.fr/mbe-tools/TTool/-/issues/86Bugs in Design Space Exploration window2018-04-16T15:00:42ZLudovic ApvrilleBugs in Design Space Exploration windowDSE window is badly organized. Maybe we should use panels: inputs, architecture parameters, Security, outputs, commandDSE window is badly organized. Maybe we should use panels: inputs, architecture parameters, Security, outputs, commandLetitia LiLetitia Lihttps://gitlab.telecom-paris.fr/mbe-tools/TTool/-/issues/118Result directory not created by DSE2018-03-26T13:33:51ZLudovic ApvrilleResult directory not created by DSEThe results cannot be generated if the target directory does not existThe results cannot be generated if the target directory does not existLudovic ApvrilleLudovic Apvrillehttps://gitlab.telecom-paris.fr/mbe-tools/TTool/-/issues/114compilation process - mkdir command2018-02-02T16:24:23ZMaysam Zoorcompilation process - mkdir commandwhen trying to compile a project on windows , the makefile contains mkdir command which result in the fail of the processwhen trying to compile a project on windows , the makefile contains mkdir command which result in the fail of the processhttps://gitlab.telecom-paris.fr/mbe-tools/TTool/-/issues/23DIPLODOCUS simulation issue when designs contain DMA units2017-09-13T15:02:04ZAndrea EnriciDIPLODOCUS simulation issue when designs contain DMA unitsIn case a DIPLODOCUS architecture diagram contains a DMA unit, the simulator cannot connect when launched from the simulator's GUI. The console from which TTool has been launched loops and prints the list of units that are present in the...In case a DIPLODOCUS architecture diagram contains a DMA unit, the simulator cannot connect when launched from the simulator's GUI. The console from which TTool has been launched loops and prints the list of units that are present in the architecture diagram. [myTest.xml](/uploads/5deac49874409c7ad244d556a4d82cc9/myTest.xml)Andrea EnriciAndrea Enricihttps://gitlab.telecom-paris.fr/mbe-tools/TTool/-/issues/22DIPLODOCUS exception when generating simulation code from a design containing...2017-09-13T15:01:45ZAndrea EnriciDIPLODOCUS exception when generating simulation code from a design containing a HWA unitIn case a DIPLODOCUS architecture diagram contains a HWA unit, when generating simulation code the following exception is raised:
slaves: ,static_cast<Slave*>(Bridge0),static_cast<Slave*>(0),static_cast<Slave*>(0),static_cast<Slave*>(...In case a DIPLODOCUS architecture diagram contains a HWA unit, when generating simulation code the following exception is raised:
slaves: ,static_cast<Slave*>(Bridge0),static_cast<Slave*>(0),static_cast<Slave*>(0),static_cast<Slave*>(Bridge0)
Exception in thread "Thread-34" java.lang.ClassCastException: tmltranslator.HwA cannot be cast to tmltranslator.HwCPU
at tmltranslator.tomappingsystemc2.TML2MappingSystemC.makeDeclarations(TML2MappingSystemC.java:384)
at tmltranslator.tomappingsystemc2.TML2MappingSystemC.generateMainFile(TML2MappingSystemC.java:139)
at tmltranslator.tomappingsystemc2.TML2MappingSystemC.generateSystemC(TML2MappingSystemC.java:133)
at ui.window.JDialogSystemCGeneration.generateCode(JDialogSystemCGeneration.java:835)
at ui.window.JDialogSystemCGeneration.run(JDialogSystemCGeneration.java:661)
at java.lang.Thread.run(Thread.java:745)Andrea EnriciAndrea Enricihttps://gitlab.telecom-paris.fr/mbe-tools/TTool/-/issues/56Post-mapping formal Verification with DIPLODOCUS Simulator does not work2017-07-31T18:36:29ZDominique BlouinPost-mapping formal Verification with DIPLODOCUS Simulator does not workOn the interactive simulation dialog, on the formal verification tab, after running exploration, there is an error when trying to view the analysis of the last RG saying "The fill could not be loaded:"On the interactive simulation dialog, on the formal verification tab, after running exploration, there is an error when trying to view the analysis of the last RG saying "The fill could not be loaded:"Dominique BlouinDominique Blouinhttps://gitlab.telecom-paris.fr/mbe-tools/TTool/-/issues/21Renaming of Bridge and Memory units in DIPLODOCUS architecture diagram2017-05-20T13:07:41ZAndrea EnriciRenaming of Bridge and Memory units in DIPLODOCUS architecture diagramIf a Bridge or a Memory unit are named as "Bridge" or "Memory" without any other heading of trailing characters, the simulation code cannot be compiled. In the case of a Bridge unit, the following g++ compilation error is raised:
out ...If a Bridge or a Memory unit are named as "Bridge" or "Memory" without any other heading of trailing characters, the simulation code cannot be compiled. In the case of a Bridge unit, the following g++ compilation error is raised:
out Makefile.defs:39: recipe for target 'lib/appmodel.o' failed
out make: Leaving directory '/home/andrea/emb-cloud-ran/designs/TTool/simulators/c++2'
error out appmodel.cpp: In constructor ‘CurrentComponents::CurrentComponents()’:
error out appmodel.cpp:54:30: error: expected type-specifier before ‘Bridge’
error out Bridge* Bridge = new Bridge(2,"Bridge", 1, 4);
error out ^
error out make: *** [lib/appmodel.o] Error 1
A similar error is raised in the case of a Memory unit. Apparently the C++ code generation engine does not add trailing characters to the identifiers of Bridge and Memory objects to distinguish them from the class identifiers Bridge and Memory.Dominique BlouinDominique Blouin