Commit f7763cf8 authored by Rakshit Mittal's avatar Rakshit Mittal
Browse files

final state-based cases

parent 32c276ac
package declarative
public
with RAMSES_properties;
with Data_Model;
system main
end main;
system implementation main.impl
subcomponents
cpu: system cpu.impl {Scheduling_Protocol => (Static); RAMSES_properties::Is_Processor => true;};
proc: process proc.impl {Deadline => 1600ms;};
connections
cpu_hyperperiod_proc_recovery: port cpu.hyperperiod -> proc.recovery;
cpu_timing_failure_event_proc_tfe: port cpu.timing_failure_event -> proc.tfe;
properties
RAMSES_properties::Execution_Slots => ([Computation_Unit => reference (cpu.core2); Start_Time => 800ms;
End_Time => 1000ms;]) in modes (LO) applies to proc.tg_phase1.Rec;
RAMSES_properties::Execution_Slots => ([Computation_Unit => reference (cpu.core1); Start_Time => 300ms;
End_Time => 1100ms;]) in modes (HI), ([Computation_Unit => reference (cpu.core1);
Start_Time => 300ms; End_Time => 900ms;]) in modes (LO) applies to proc.tg_phase1.Nav;
RAMSES_properties::Execution_Slots => ([Computation_Unit => reference (cpu.core1); Start_Time => 1300ms;
End_Time => 1600ms;]) in modes (LO) applies to proc.tg_phase1.Com;
RAMSES_properties::Execution_Slots => ([Computation_Unit => reference (cpu.core1); Start_Time => 1100ms;
End_Time => 1300ms;]) in modes (LO) applies to proc.tg_phase1.Log;
Actual_Processor_Binding => (reference (cpu)) applies to proc;
Actual_Memory_Binding => (reference (cpu.internal_memory)) applies to proc;
RAMSES_properties::Execution_Slots => ([Computation_Unit => reference (cpu.core2); Start_Time => 0ms;
End_Time => 600ms;]) in modes (LO) applies to proc.tg_phase1.Video;
RAMSES_properties::Execution_Slots => ([Computation_Unit => reference (cpu.core1); Start_Time => 0ms;
End_Time => 300ms;]) in modes (HI), ([Computation_Unit => reference (cpu.core1); Start_Time => 0ms;
End_Time => 300ms;]) in modes (LO) applies to proc.tg_phase1.Avoid;
RAMSES_properties::Execution_Slots => ([Computation_Unit => reference (cpu.core1); Start_Time => 1100ms;
End_Time => 1600ms;]) in modes (HI), ([Computation_Unit => reference (cpu.core1);
Start_Time => 900ms; End_Time => 1100ms;]) in modes (LO) applies to proc.tg_phase1.Stab;
RAMSES_properties::Execution_Slots => ([Computation_Unit => reference (cpu.core2); Start_Time => 600ms;
End_Time => 800ms;]) in modes (LO) applies to proc.tg_phase1.GPS;
end main.impl;
system cpu
features
timing_failure_event: out event port;
hyperperiod: out event port;
end cpu;
process proc
features
to_phase1: in event port;
recovery: in event port;
tfe: in event port;
end proc;
process implementation proc.impl
subcomponents
tg_phase1: thread group tg_phase1.impl;
connections
proc_recovery_tg_phase1_recovery: port recovery -> tg_phase1.recovery;
proc_tfe_tg_phase1_tfe: port tfe -> tg_phase1.tfe;
end proc.impl;
thread group tg_phase1
features
recovery: in event port;
tfe: in event port;
end tg_phase1;
thread group implementation tg_phase1.impl
subcomponents
Nav: thread Nav {Priority => 1; Criticality => 4; Compute_Execution_Time => 800ms .. 800ms in modes (
HI), 600ms .. 600ms in modes (LO); Dispatch_Protocol => Periodic; Period => 1600ms;} in modes (
LO => LO, HI => HI);
Stab: thread Stab {Period => 1600ms; Compute_Execution_Time => 500ms .. 500ms in modes (
HI), 200ms .. 200ms in modes (LO); Dispatch_Protocol => Periodic; Criticality => 4;
Priority => 1;} in modes (LO => LO, HI => HI);
Avoid: thread Avoid {Dispatch_Protocol => Periodic; Criticality => 4;
Compute_Execution_Time => 300ms .. 300ms in modes (HI), 300ms .. 300ms in modes (LO); Priority => 1;
Period => 1600ms;} in modes (HI => HI, LO => LO);
Log: thread Log {Compute_Execution_Time => 200ms .. 200ms in modes (LO); Priority => 1; Criticality => 2;
Dispatch_Protocol => Periodic; RAMSES_properties::Weakly_Hard_Real_Time_Constraint => [
Timing_Failure_Limit => 1; In_Frame => 2;]; Period => 1600ms;} in modes (LO => LO);
Video: thread Video {Criticality => 2; Dispatch_Protocol => Periodic; Period => 1600ms; Priority => 1;
Compute_Execution_Time => 600ms .. 600ms in modes (LO);} in modes (LO => LO);
GPS: thread GPS {Priority => 1; Compute_Execution_Time => 200ms .. 200ms in modes (LO);
Dispatch_Protocol => Periodic; Criticality => 2; Period => 1600ms;} in modes (LO => LO);
Rec: thread Rec {Criticality => 2; Compute_Execution_Time => 200ms .. 200ms in modes (LO); Priority => 1;
Period => 1600ms; Dispatch_Protocol => Periodic;} in modes (LO => LO);
Com: thread Com {Compute_Execution_Time => 300ms .. 300ms in modes (LO); Criticality => 2; Priority => 1;
Dispatch_Protocol => Periodic; Period => 1600ms;} in modes (LO => LO);
connections
Stab_cmd_out_Log_cmd_in: port Stab.cmd_out -> Log.cmd_in {Timing => immediate;};
Log_info_out_Com_info_in: port Log.info_out -> Com.info_in {Timing => immediate;};
Nav_speed_out_Log_speed_in: port Nav.speed_out -> Log.speed_in {Timing => immediate;};
Avoid_obst_out_Nav_obst_in: port Avoid.obst_out -> Nav.obst_in {Timing => immediate;};
Avoid_obst_out_Log_obst_in: port Avoid.obst_out -> Log.obst_in {Timing => immediate;};
Nav_speed_out_Stab_speed_in: port Nav.speed_out -> Stab.speed_in {Timing => immediate;};
GPS_pos_out_Rec_pos_in: port GPS.pos_out -> Rec.pos_in {Timing => immediate;};
modes
LO: initial mode;
HI: mode;
LO_tfe_HI: LO -[tfe]-> HI {Mode_Transition_Response => emergency;};
HI_recovery_LO: HI -[recovery]-> LO {Mode_Transition_Response => planned;};
end tg_phase1.impl;
thread Nav
features
speed_out: out data port {Data_Model::Data_Representation => Integer;};
obst_in: in data port {Data_Model::Data_Representation => Integer;};
requires modes LO: mode;
HI: mode;
end Nav;
thread Stab
features
speed_in: in data port {Data_Model::Data_Representation => Integer;};
cmd_out: out data port {Data_Model::Data_Representation => Integer;};
requires modes LO: mode;
HI: mode;
end Stab;
system implementation cpu.impl
subcomponents
core2: processor core2 {Frame_Period => 1600ms;};
core1: processor core1 {Frame_Period => 1600ms;};
internal_memory: memory internal_memory;
end cpu.impl;
processor core2
end core2;
thread Avoid
features
obst_out: out data port {Data_Model::Data_Representation => Integer;};
requires modes HI: mode;
LO: mode;
end Avoid;
thread Log
features
cmd_in: in data port {Data_Model::Data_Representation => Integer;};
obst_in: in data port {Data_Model::Data_Representation => Integer;};
info_out: out data port {Data_Model::Data_Representation => Integer;};
speed_in: in data port {Data_Model::Data_Representation => Integer;};
requires modes LO: mode;
end Log;
thread Video
requires modes LO: mode;
end Video;
processor core1
end core1;
thread GPS
features
pos_out: out data port {Data_Model::Data_Representation => Integer;};
requires modes LO: mode;
end GPS;
thread Rec
features
pos_in: in data port {Data_Model::Data_Representation => Integer;};
requires modes LO: mode;
end Rec;
thread Com
features
info_in: in data port {Data_Model::Data_Representation => Integer;};
requires modes LO: mode;
end Com;
memory internal_memory
end internal_memory;
end declarative;
\ No newline at end of file
--
-- AADL-RAMSES
--
-- Copyright © 2012 TELECOM ParisTech and CNRS
--
-- TELECOM ParisTech/LTCI
--
-- Authors: see AUTHORS
--
-- This program is free software: you can redistribute it and/or modify
-- it under the terms of the Eclipse Public License as published by Eclipse,
-- either version 1.0 of the License, or (at your option) any later version.
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- Eclipse Public License for more details.
-- You should have received a copy of the Eclipse Public License
-- along with this program. If not, see
-- http://www.eclipse.org/org/documents/epl-v10.php
--
package dim_test_ramses_state
public
with Base_Types; renames Base_Types::all;
with RAMSES_Properties;
system main
end main;
system implementation main.impl
subcomponents
the_proc: process proc.impl;
the_mem: memory mem.impl;
properties
actual_memory_binding => (reference (the_mem)) applies to the_proc;
end main.impl;
system implementation main.linux extends main.impl
subcomponents
the_cpu: processor cpu.impl {RAMSES_Properties::Target => "linux";};
properties
actual_processor_binding => (reference (the_cpu)) applies to the_proc;
end main.linux;
processor cpu
end cpu;
processor implementation cpu.impl
properties
Scheduling_Protocol => (RMS) ;
end cpu.impl;
process proc
end proc;
process implementation proc.impl
subcomponents
the_sender: thread sender.impl;
the_receiver: thread receiver.impl;
connections
cnx: port the_sender.p -> the_receiver.p;
end proc.impl;
memory mem
end mem;
memory implementation mem.impl
properties
Memory_Size => 200000 Bytes;
end mem.impl;
thread sender
features
p: out data port Integer_16;
properties
Dispatch_Protocol => Periodic;
Compute_Execution_Time => 0 ms .. 1 ms;
Period => 2000 Ms;
Priority => 5;
Data_Size => 40000 bytes;
Stack_Size => 512 bytes;
Code_Size => 40 bytes;
end sender;
thread implementation sender.impl
calls
call : { c : subprogram sender_spg;};
connections
cnx: parameter c.result -> p;
properties
Compute_Entrypoint_Call_Sequence => reference (call);
end sender.impl;
subprogram sender_spg
features
result : out parameter Integer_16;
properties
source_name => "send";
source_language => (C);
source_text => ("../src/user_code.h","../src/user_code.c");
end sender_spg;
thread receiver
features
p: in data port Integer_16;
properties
Dispatch_Protocol => Periodic;
Compute_Execution_Time => 0 ms .. 1 ms;
Period => 1000 Ms;
Priority => 10;
Data_Size => 40000 bytes;
Stack_Size => 512 bytes;
Code_Size => 40 bytes;
end receiver;
thread implementation receiver.impl
calls
call : { c : subprogram receiver_spg;};
connections
cnx: parameter p -> c.input;
properties
Compute_Entrypoint_Call_Sequence => reference (call);
end receiver.impl;
subprogram receiver_spg
features
input : in parameter Integer_16;
properties
source_name => "receive";
source_language => (C);
source_text => ("../src/user_code.h","../src/user_code.c");
end receiver_spg;
end dim_test_ramses_state;
\ No newline at end of file
......@@ -41,6 +41,6 @@ public class TestState extends TestAbstract {
@Test
public void testRAMSESState() throws Exception {
computeFinalBaseDirectory(1, 0);
testDIMTransformationState("sampled-communications-local-communications_refined_model_impl_Instance");
testDIMTransformationState("sampled-communications_main_linux_Instance");
}
}
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