Commit 7f7e2602 authored by Renaud Pacalet's avatar Renaud Pacalet
Browse files

Add fmir4zynq platform. Add copyright headers and vim mode line footers.

parent 54b43c9e
#!/usr/bin/env bash
#
# Embb ( http://embb.telecom-paristech.fr/ ) - This file is part of Embb
# Copyright (C) - Telecom ParisTech
# Contacts: contact-embb@telecom-paristech.fr
#
# Embb is governed by the CeCILL license under French law and abiding by the rules
# of distribution of free software. You can use, modify and/ or redistribute the
# software under the terms of the CeCILL license. You should have received a copy
# of the CeCILL license along with this program; if not, you can access it online
# at http://www.cecill.info/licences/Licence_CeCILL_V2.1-en.txt
#
here=$(dirname $(realpath ${BASH_SOURCE[@]}))
source "$here/tools/hwprj/bash_completion.d/hwprj"
embb () { make -f "$here/hwprj/Makefile" "$@"; }
complete -F _hwprj embb
# vim: set tabstop=4 softtabstop=4 shiftwidth=4 noexpandtab textwidth=0:
/doc/build/
The Embb project is supported by the French FUI project NETCOM under grant agreement F1405046 U.
<!--
Embb ( http://embb.telecom-paristech.fr/ ) - This file is part of Embb
Copyright (C) - Telecom ParisTech
Contacts: contact-embb@telecom-paristech.fr
Embb is governed by the CeCILL license under French law and abiding by the rules
of distribution of free software. You can use, modify and/ or redistribute the
software under the terms of the CeCILL license. You should have received a copy
of the CeCILL license along with this program; if not, you can access it online
at http://www.cecill.info/licences/Licence_CeCILL_V2.1-en.txt
-->
# Embb, a generic hardware and software architecture for digital signal processing
......@@ -119,3 +129,5 @@ Important note: the VHDL source code of Embb is not yet available as a separate
[zedboard]: http://www.zedboard.org/
[digilent]: http://www.digilentinc.com/
[soclib]: http://www.soclib.fr/
<!-- vim: set tabstop=4 softtabstop=4 shiftwidth=4 noexpandtab textwidth=0: -->
......@@ -2,12 +2,12 @@
# Embb ( http://embb.telecom-paristech.fr/ ) - This file is part of Embb
# Copyright (C) - Telecom ParisTech
# Contacts: contact-embb@telecom-paristech.fr
#
# This file must be used under the terms of the CeCILL.
# This source file is licensed as described in the file COPYING, which
# you should have received as part of this distribution. The terms
# are also available at
# http://www.cecill.info/licences/Licence_CeCILL_V2.1-en.txt
#
# Embb is governed by the CeCILL license under French law and abiding by the rules
# of distribution of free software. You can use, modify and/ or redistribute the
# software under the terms of the CeCILL license. You should have received a copy
# of the CeCILL license along with this program; if not, you can access it online
# at http://www.cecill.info/licences/Licence_CeCILL_V2.1-en.txt
#
SHELL := bash
......@@ -44,6 +44,17 @@ adaif_figs := $(patsubst $(FIGDIR)/%.fig,$(BUILDDIR)/%-fig.pdf_t,$(wildcard $(FI
adaif_texs := adaif_ds.tex adaif_ug.tex adaif_lib_bitfield.tex adaif_extra_bitfield.tex
$(BUILDDIR)/adaif.pdf: $(adaif_figs) $(adaif_texs)
adaifem1_figs := $(patsubst $(FIGDIR)/%.fig,$(BUILDDIR)/%-fig.pdf_t,$(wildcard $(FIGDIR)/adaifem1_*.fig))
adaifem1_texs := adaifem1_ds.tex adaifem1_ug.tex adaifem1_bitfield.tex adaifem1_extra_bitfield.tex
$(BUILDDIR)/adaifem1.pdf: $(adaifem1_figs) $(adaifem1_texs)
ahb2vci_figs := $(patsubst $(FIGDIR)/%.fig,$(BUILDDIR)/%-fig.pdf_t,$(wildcard $(FIGDIR)/ahb2vci*.fig))
ahb2vci_texs := ahb2vci_ug.tex
$(BUILDDIR)/ahb2vci.pdf: $(ahb2vci_figs) $(ahb2vci_texs)
axi4lite32_slave_to_bvci64_initiator_texs := bridge_bitfield.tex
$(BUILDDIR)/axi4lite32_slave_to_bvci64_initiator.pdf: $(axi4lite32_slave_to_bvci64_initiator_texs)
crossbar_figs := $(patsubst $(FIGDIR)/%.fig,$(BUILDDIR)/%-fig.pdf_t,$(wildcard $(FIGDIR)/crossbar_*.fig))
crossbar_texs := crossbar_ug.tex crossbar_lib_bitfield.tex
$(BUILDDIR)/crossbar.pdf: $(crossbar_figs) $(crossbar_texs)
......@@ -69,6 +80,10 @@ mapper_figs := $(patsubst $(FIGDIR)/%.fig,$(BUILDDIR)/%-fig.pdf_t,$(wildcard $(F
mapper_texs := mapper_lib_bitfield.tex mapper_ds.tex mapper_ug.tex
$(BUILDDIR)/mapper.pdf: $(mapper_figs) $(mapper_texs)
viterbi_figs := $(patsubst $(FIGDIR)/%.fig,$(BUILDDIR)/%-fig.pdf_t,$(wildcard $(FIGDIR)/viterbi_*.fig))
viterbi_texs := viterbi_bitfield.tex
$(BUILDDIR)/viterbi.pdf: $(viterbi_figs) $(viterbi_texs)
an_figs := $(patsubst %,$(BUILDDIR)/%-fig.pdf_t,fep_pilots fep_ofdm)
an_texs := fep_an.tex
$(BUILDDIR)/an.pdf: $(an_figs) $(an_texs) $(BIBLIO)
......@@ -86,3 +101,4 @@ embb_figs := $(patsubst $(FIGDIR)/%.fig,$(BUILDDIR)/%-fig.pdf_t,$(wildcard $(FIG
embb_texs := $(wildcard *.tex) $(BFTEXS)
$(BUILDDIR)/embb.pdf: $(embb_figs) $(embb_texs) $(BIBLIO)
# vim: set tabstop=4 softtabstop=4 shiftwidth=4 noexpandtab textwidth=0:
......@@ -2,13 +2,14 @@
% Embb ( http://embb.telecom-paristech.fr/ ) - This file is part of Embb
% Copyright (C) - Telecom ParisTech
% Contacts: contact-embb@telecom-paristech.fr
%
% Embb is governed by the CeCILL license under French law and abiding by the rules
% of distribution of free software. You can use, modify and/ or redistribute the
% software under the terms of the CeCILL license. You should have received a copy
% of the CeCILL license along with this program; if not, you can access it online
% at http://www.cecill.info/licences/Licence_CeCILL_V2.1-en.txt
%
% This file must be used under the terms of the CeCILL.
% This source file is licensed as described in the file COPYING, which
% you should have received as part of this distribution. The terms
% are also available at
% http://www.cecill.info/licences/Licence_CeCILL_V2.1-en.txt
%
\input{hdr}
\input{adaif_lib_bitfield}
\input{adaif_extra_bitfield}
......@@ -73,3 +74,5 @@ comprehensive description in chapter \ref{ch:ds}.
% \bibliographystyle{plain}
\end{document}
% vim: set tabstop=4 softtabstop=4 shiftwidth=4 noexpandtab textwidth=0:
......@@ -2,13 +2,14 @@
% Embb ( http://embb.telecom-paristech.fr/ ) - This file is part of Embb
% Copyright (C) - Telecom ParisTech
% Contacts: contact-embb@telecom-paristech.fr
%
% Embb is governed by the CeCILL license under French law and abiding by the rules
% of distribution of free software. You can use, modify and/ or redistribute the
% software under the terms of the CeCILL license. You should have received a copy
% of the CeCILL license along with this program; if not, you can access it online
% at http://www.cecill.info/licences/Licence_CeCILL_V2.1-en.txt
%
% This file must be used under the terms of the CeCILL.
% This source file is licensed as described in the file COPYING, which
% you should have received as part of this distribution. The terms
% are also available at
% http://www.cecill.info/licences/Licence_CeCILL_V2.1-en.txt
%
\section{The RX synchronizer}
Each $RX_i$ interface is driven by a dedicated RXCLK clock generated by its own A/D converter. The RX synchronizer is responsible for transferring the RXDATA
......@@ -103,3 +104,5 @@ of an outgoing sample by the environment (rising edge of TXCLK with TXACK set) a
where $t_{CLK}$ is the clock period of CLK. If outgoing samples can be sampled on every TXCLK rising edge (fast output, TXACK always set) the
$t_{TXCLK}>2.5\times t_{CLK}$ constraint must be met, else the receiving environment could sample again before a new sample has been sampled in the input
register. If outgoing samples are, at most, consumed every $n\ge 1$ TXCLK rising edges, the constraint becomes: $n\times t_{TXCLK}>2.5\times t_{CLK}$.
% vim: set tabstop=4 softtabstop=4 shiftwidth=4 noexpandtab textwidth=0:
......@@ -2,13 +2,14 @@
% Embb ( http://embb.telecom-paristech.fr/ ) - This file is part of Embb
% Copyright (C) - Telecom ParisTech
% Contacts: contact-embb@telecom-paristech.fr
%
% Embb is governed by the CeCILL license under French law and abiding by the rules
% of distribution of free software. You can use, modify and/ or redistribute the
% software under the terms of the CeCILL license. You should have received a copy
% of the CeCILL license along with this program; if not, you can access it online
% at http://www.cecill.info/licences/Licence_CeCILL_V2.1-en.txt
%
% This file must be used under the terms of the CeCILL.
% This source file is licensed as described in the file COPYING, which
% you should have received as part of this distribution. The terms
% are also available at
% http://www.cecill.info/licences/Licence_CeCILL_V2.1-en.txt
%
%%% \bfAdaifCfgDetailed : detailed cfg register layout
\newcommand{\bfAdaifCfgDetailed}{\begin{bytefield}{32}\vspace{.2cm}\\
......@@ -147,3 +148,5 @@
\ifx\wowolabel\withlabel\relax\label{fig:adaif_lvl_layout}\fi
\end{figure}
}
% vim: set tabstop=4 softtabstop=4 shiftwidth=4 noexpandtab textwidth=0:
This diff is collapsed.
This diff is collapsed.
......@@ -2,13 +2,14 @@
% Embb ( http://embb.telecom-paristech.fr/ ) - This file is part of Embb
% Copyright (C) - Telecom ParisTech
% Contacts: contact-embb@telecom-paristech.fr
%
% Embb is governed by the CeCILL license under French law and abiding by the rules
% of distribution of free software. You can use, modify and/ or redistribute the
% software under the terms of the CeCILL license. You should have received a copy
% of the CeCILL license along with this program; if not, you can access it online
% at http://www.cecill.info/licences/Licence_CeCILL_V2.1-en.txt
%
% This file must be used under the terms of the CeCILL.
% This source file is licensed as described in the file COPYING, which
% you should have received as part of this distribution. The terms
% are also available at
% http://www.cecill.info/licences/Licence_CeCILL_V2.1-en.txt
%
\section*{Revision history}
\begin{table}[htbp]
......@@ -589,3 +590,5 @@ of the parameters registers are listed in table \ref{tab:adaif_fields}.
\bfFigAdaifEie[0]
\bfFigAdaifPtr[0]
\bfFigAdaifLvl[0]
% vim: set tabstop=4 softtabstop=4 shiftwidth=4 noexpandtab textwidth=0:
......@@ -2,13 +2,14 @@
% Embb ( http://embb.telecom-paristech.fr/ ) - This file is part of Embb
% Copyright (C) - Telecom ParisTech
% Contacts: contact-embb@telecom-paristech.fr
%
% Embb is governed by the CeCILL license under French law and abiding by the rules
% of distribution of free software. You can use, modify and/ or redistribute the
% software under the terms of the CeCILL license. You should have received a copy
% of the CeCILL license along with this program; if not, you can access it online
% at http://www.cecill.info/licences/Licence_CeCILL_V2.1-en.txt
%
% This file must be used under the terms of the CeCILL.
% This source file is licensed as described in the file COPYING, which
% you should have received as part of this distribution. The terms
% are also available at
% http://www.cecill.info/licences/Licence_CeCILL_V2.1-en.txt
%
\input{hdr}
\addeditor{RP}
......@@ -63,3 +64,5 @@ The Application Programming Interface is documented in the separate \emph{libemb
\bibliographystyle{plain}
\end{document}
% vim: set tabstop=4 softtabstop=4 shiftwidth=4 noexpandtab textwidth=0:
......@@ -2,13 +2,14 @@
% Embb ( http://embb.telecom-paristech.fr/ ) - This file is part of Embb
% Copyright (C) - Telecom ParisTech
% Contacts: contact-embb@telecom-paristech.fr
%
% Embb is governed by the CeCILL license under French law and abiding by the rules
% of distribution of free software. You can use, modify and/ or redistribute the
% software under the terms of the CeCILL license. You should have received a copy
% of the CeCILL license along with this program; if not, you can access it online
% at http://www.cecill.info/licences/Licence_CeCILL_V2.1-en.txt
%
% This file must be used under the terms of the CeCILL.
% This source file is licensed as described in the file COPYING, which
% you should have received as part of this distribution. The terms
% are also available at
% http://www.cecill.info/licences/Licence_CeCILL_V2.1-en.txt
%
\input{hdr}
\input{crossbar_lib_bitfield}
......@@ -55,3 +56,5 @@ This document describes the crossbar of the \Embb processor. The crossbar is a 6
\backmatter
\end{document}
% vim: set tabstop=4 softtabstop=4 shiftwidth=4 noexpandtab textwidth=0:
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
%% Auto generated by BFGen, do not edit
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% bfgen -o latex --output=crossbar_lib_bitfield.tex
% You must use:
% \usepackage{bytefield}
% \usepackage{color}
% \usepackage{rotating}
% \usepackage{longtable}
\definecolor{bfpadding}{gray}{.75}
\providecommand{\setfirstbitindex}[1][0]{\hspace{#1\bitwidth}}
%%% \bfCrossbarSrstn : srstn register layout
\newcommand{\bfCrossbarSrstn}{\begin{bytefield}{32}\vspace{.2cm}\\
\bitheader[endianness=big,lsb=0]{0,31} \\
\bitbox{32}{{\tiny srstn}} \\
\bitheader[endianness=big,lsb=32]{32,63} \\
\bitbox{32}{{\tiny srstn}} \\
\bitheader[endianness=big,lsb=64]{64,95} \\
\bitbox{32}{{\tiny srstn}} \\
\bitheader[endianness=big,lsb=96]{96,127} \\
\bitbox{32}{{\tiny srstn}} \\
\bitheader[endianness=big,lsb=128]{128,159} \\
\bitbox{32}{{\tiny srstn}} \\
\bitheader[endianness=big,lsb=160]{160,191} \\
\bitbox{32}{{\tiny srstn}} \\
\bitheader[endianness=big,lsb=192]{192,223} \\
\bitbox{32}{{\tiny srstn}} \\
\bitheader[endianness=big,lsb=224]{224,255} \\
\bitbox{32}{{\tiny srstn}} \\
\end{bytefield}}
%%% \bfFigCrossbarSrstn : srstn register layout within figure
\newcommand{\bfFigCrossbarSrstn}[1][withlabel]{ % one optional argument empty by default; empty => label, else => no label
\def\withlabel{withlabel}
\def\wowolabel{#1}
\begin{figure}[!ht]
\centering
\bfCrossbarSrstn
\caption{\texttt{srstn} register layout (host address \texttt{0xFFF00})}
\ifx\wowolabel\withlabel\relax\label{fig:crossbar_srstn_layout}\fi
\end{figure}
}
%%% \bfCrossbarCe : ce register layout
\newcommand{\bfCrossbarCe}{\begin{bytefield}{32}\vspace{.2cm}\\
\bitheader[endianness=big,lsb=0]{0,31} \\
\bitbox{32}{{\tiny ce}} \\
\bitheader[endianness=big,lsb=32]{32,63} \\
\bitbox{32}{{\tiny ce}} \\
\bitheader[endianness=big,lsb=64]{64,95} \\
\bitbox{32}{{\tiny ce}} \\
\bitheader[endianness=big,lsb=96]{96,127} \\
\bitbox{32}{{\tiny ce}} \\
\bitheader[endianness=big,lsb=128]{128,159} \\
\bitbox{32}{{\tiny ce}} \\
\bitheader[endianness=big,lsb=160]{160,191} \\
\bitbox{32}{{\tiny ce}} \\
\bitheader[endianness=big,lsb=192]{192,223} \\
\bitbox{32}{{\tiny ce}} \\
\bitheader[endianness=big,lsb=224]{224,255} \\
\bitbox{32}{{\tiny ce}} \\
\end{bytefield}}
%%% \bfFigCrossbarCe : ce register layout within figure
\newcommand{\bfFigCrossbarCe}[1][withlabel]{ % one optional argument empty by default; empty => label, else => no label
\def\withlabel{withlabel}
\def\wowolabel{#1}
\begin{figure}[!ht]
\centering
\bfCrossbarCe
\caption{\texttt{ce} register layout (host address \texttt{0xFFF20})}
\ifx\wowolabel\withlabel\relax\label{fig:crossbar_ce_layout}\fi
\end{figure}
}
%%% \bfCrossbarHirq : hirq register layout
\newcommand{\bfCrossbarHirq}{\begin{bytefield}{32}\vspace{.2cm}\\
\bitheader[endianness=big,lsb=0]{0,31} \\
\bitbox{32}{{\tiny hirq}} \\
\bitheader[endianness=big,lsb=32]{32,63} \\
\bitbox{32}{{\tiny hirq}} \\
\bitheader[endianness=big,lsb=64]{64,95} \\
\bitbox{32}{{\tiny hirq}} \\
\bitheader[endianness=big,lsb=96]{96,127} \\
\bitbox{32}{{\tiny hirq}} \\
\bitheader[endianness=big,lsb=128]{128,159} \\
\bitbox{32}{{\tiny hirq}} \\
\bitheader[endianness=big,lsb=160]{160,191} \\
\bitbox{32}{{\tiny hirq}} \\
\bitheader[endianness=big,lsb=192]{192,223} \\
\bitbox{32}{{\tiny hirq}} \\
\bitheader[endianness=big,lsb=224]{224,255} \\
\bitbox{32}{{\tiny hirq}} \\
\end{bytefield}}
%%% \bfFigCrossbarHirq : hirq register layout within figure
\newcommand{\bfFigCrossbarHirq}[1][withlabel]{ % one optional argument empty by default; empty => label, else => no label
\def\withlabel{withlabel}
\def\wowolabel{#1}
\begin{figure}[!ht]
\centering
\bfCrossbarHirq
\caption{\texttt{hirq} register layout (host address \texttt{0xFFF40})}
\ifx\wowolabel\withlabel\relax\label{fig:crossbar_hirq_layout}\fi
\end{figure}
}
%%% \bfCrossbarConfig : config register layout
\newcommand{\bfCrossbarConfig}{\begin{bytefield}{32}\vspace{.2cm}\\
\bitheader[endianness=big,lsb=0]{0,1,31} \\
\bitbox{31}{\color{bfpadding}\rule{\width}{\height}} \bitbox{1}{\rotatebox{90}{\tiny irqtm}} \\
\bitheader[endianness=big,lsb=32]{32,63} \\
\bitbox{32}{\color{bfpadding}\rule{\width}{\height}} \\
\end{bytefield}}
%%% \bfFigCrossbarConfig : config register layout within figure
\newcommand{\bfFigCrossbarConfig}[1][withlabel]{ % one optional argument empty by default; empty => label, else => no label
\def\withlabel{withlabel}
\def\wowolabel{#1}
\begin{figure}[!ht]
\centering
\bfCrossbarConfig
\caption{\texttt{config} register layout (host address \texttt{0xFFF60})}
\ifx\wowolabel\withlabel\relax\label{fig:crossbar_config_layout}\fi
\end{figure}
}
%%% \bfCrossbarStatus : status register layout
\newcommand{\bfCrossbarStatus}{\begin{bytefield}{32}\vspace{.2cm}\\
\bitheader[endianness=big,lsb=0]{0,15,16,30,31} \\
\bitbox{1}{\rotatebox{90}{\tiny irqv}} \bitbox{15}{\color{bfpadding}\rule{\width}{\height}} \bitbox{16}{{\tiny irqi}} \\
\bitheader[endianness=big,lsb=32]{32,63} \\
\bitbox{32}{\color{bfpadding}\rule{\width}{\height}} \\
\end{bytefield}}
%%% \bfFigCrossbarStatus : status register layout within figure
\newcommand{\bfFigCrossbarStatus}[1][withlabel]{ % one optional argument empty by default; empty => label, else => no label
\def\withlabel{withlabel}
\def\wowolabel{#1}
\begin{figure}[!ht]
\centering
\bfCrossbarStatus
\caption{\texttt{status} register layout (host address \texttt{0xFFF68})}
\ifx\wowolabel\withlabel\relax\label{fig:crossbar_status_layout}\fi
\end{figure}
}
%%% \bfCrossbarIrqmsk : irqmsk register layout
\newcommand{\bfCrossbarIrqmsk}{\begin{bytefield}{32}\vspace{.2cm}\\
\bitheader[endianness=big,lsb=0]{0,31} \\
\bitbox{32}{{\tiny msk}} \\
\bitheader[endianness=big,lsb=32]{32,63} \\
\bitbox{32}{{\tiny msk}} \\
\bitheader[endianness=big,lsb=64]{64,95} \\
\bitbox{32}{{\tiny msk}} \\
\bitheader[endianness=big,lsb=96]{96,127} \\
\bitbox{32}{{\tiny msk}} \\
\bitheader[endianness=big,lsb=128]{128,159} \\
\bitbox{32}{{\tiny msk}} \\
\bitheader[endianness=big,lsb=160]{160,191} \\
\bitbox{32}{{\tiny msk}} \\
\bitheader[endianness=big,lsb=192]{192,223} \\
\bitbox{32}{{\tiny msk}} \\
\bitheader[endianness=big,lsb=224]{224,255} \\
\bitbox{32}{{\tiny msk}} \\
\bitheader[endianness=big,lsb=256]{256,287} \\
\bitbox{32}{{\tiny msk}} \\
\bitheader[endianness=big,lsb=288]{288,319} \\
\bitbox{32}{{\tiny msk}} \\
\bitheader[endianness=big,lsb=320]{320,351} \\
\bitbox{32}{{\tiny msk}} \\
\bitheader[endianness=big,lsb=352]{352,383} \\
\bitbox{32}{{\tiny msk}} \\
\bitheader[endianness=big,lsb=384]{384,415} \\
\bitbox{32}{{\tiny msk}} \\
\bitheader[endianness=big,lsb=416]{416,447} \\
\bitbox{32}{{\tiny msk}} \\
\bitheader[endianness=big,lsb=448]{448,479} \\
\bitbox{32}{{\tiny msk}} \\
\bitheader[endianness=big,lsb=480]{480,511} \\
\bitbox{32}{{\tiny msk}} \\
\bitheader[endianness=big,lsb=512]{512,543} \\
\bitbox{32}{{\tiny msk}} \\
\bitheader[endianness=big,lsb=544]{544,575} \\
\bitbox{32}{{\tiny msk}} \\
\bitheader[endianness=big,lsb=576]{576,607} \\
\bitbox{32}{{\tiny msk}} \\
\bitheader[endianness=big,lsb=608]{608,639} \\
\bitbox{32}{{\tiny msk}} \\
\bitheader[endianness=big,lsb=640]{640,671} \\
\bitbox{32}{{\tiny msk}} \\
\bitheader[endianness=big,lsb=672]{672,703} \\
\bitbox{32}{{\tiny msk}} \\
\bitheader[endianness=big,lsb=704]{704,735} \\
\bitbox{32}{{\tiny msk}} \\
\bitheader[endianness=big,lsb=736]{736,767} \\
\bitbox{32}{{\tiny msk}} \\
\bitheader[endianness=big,lsb=768]{768,799} \\
\bitbox{32}{{\tiny msk}} \\
\bitheader[endianness=big,lsb=800]{800,831} \\
\bitbox{32}{{\tiny msk}} \\
\bitheader[endianness=big,lsb=832]{832,863} \\
\bitbox{32}{{\tiny msk}} \\
\bitheader[endianness=big,lsb=864]{864,895} \\
\bitbox{32}{{\tiny msk}} \\
\bitheader[endianness=big,lsb=896]{896,927} \\
\bitbox{32}{{\tiny msk}} \\
\bitheader[endianness=big,lsb=928]{928,959} \\
\bitbox{32}{{\tiny msk}} \\
\bitheader[endianness=big,lsb=960]{960,991} \\
\bitbox{32}{{\tiny msk}} \\
\bitheader[endianness=big,lsb=992]{992,1023} \\
\bitbox{32}{{\tiny msk}} \\
\end{bytefield}}
%%% \bfFigCrossbarIrqmsk : irqmsk register layout within figure
\newcommand{\bfFigCrossbarIrqmsk}[1][withlabel]{ % one optional argument empty by default; empty => label, else => no label
\def\withlabel{withlabel}
\def\wowolabel{#1}
\begin{figure}[!ht]
\centering
\bfCrossbarIrqmsk
\caption{\texttt{irqmsk} register layout (host address \texttt{0xFFF80})}
\ifx\wowolabel\withlabel\relax\label{fig:crossbar_irqmsk_layout}\fi
\end{figure}
}
%%% \bfTableCrossbarSrstn : srstn register fields table
\newcommand{\bfTableCrossbarSrstn}[1][withlabel]{ % one optional argument empty by default; empty => label, else => no label
\def\withlabel{withlabel}
\def\wowolabel{#1}
\begin{longtable}{|p{0.1\textwidth}|p{0.1\textwidth}|p{0.2\textwidth}|p{0.6\textwidth}|}
\caption{\texttt{srstn} register fields (host address \texttt{0xFFF00})}\ifx\wowolabel\withlabel\relax\label{tab:crossbar_srstn_fields}\fi\\
\hline
\textbf{Name} & \textbf{Width} & \textbf{Long name} & \textbf{Description} \\
\endfirsthead
\hline
\textbf{Name} & \textbf{Width} & \textbf{Long name} & \textbf{Description} \\
\endhead
\hline
\texttt{srstn} & 256 bits & Synchronous ReSeT Not & One bit per DSP Unit, directly wired to its active low synchronous reset \\
\hline
\end{longtable}
}
%%% \bfDocCrossbarSrstn : srstn register doc text
\newcommand{\bfDocCrossbarSrstn}{}
%%% \bfTableCrossbarCe : ce register fields table
\newcommand{\bfTableCrossbarCe}[1][withlabel]{ % one optional argument empty by default; empty => label, else => no label
\def\withlabel{withlabel}
\def\wowolabel{#1}
\begin{longtable}{|p{0.1\textwidth}|p{0.1\textwidth}|p{0.2\textwidth}|p{0.6\textwidth}|}
\caption{\texttt{ce} register fields (host address \texttt{0xFFF20})}\ifx\wowolabel\withlabel\relax\label{tab:crossbar_ce_fields}\fi\\
\hline
\textbf{Name} & \textbf{Width} & \textbf{Long name} & \textbf{Description} \\
\endfirsthead
\hline
\textbf{Name} & \textbf{Width} & \textbf{Long name} & \textbf{Description} \\
\endhead
\hline
\texttt{ce} & 256 bits & Chip Enable & One bit per DSP Unit, directly wired to its active high chip enable \\
\hline
\end{longtable}
}
%%% \bfDocCrossbarCe : ce register doc text
\newcommand{\bfDocCrossbarCe}{}
%%% \bfTableCrossbarHirq : hirq register fields table
\newcommand{\bfTableCrossbarHirq}[1][withlabel]{ % one optional argument empty by default; empty => label, else => no label
\def\withlabel{withlabel}
\def\wowolabel{#1}
\begin{longtable}{|p{0.1\textwidth}|p{0.1\textwidth}|p{0.2\textwidth}|p{0.6\textwidth}|}
\caption{\texttt{hirq} register fields (host address \texttt{0xFFF40})}\ifx\wowolabel\withlabel\relax\label{tab:crossbar_hirq_fields}\fi\\
\hline
\textbf{Name} & \textbf{Width} & \textbf{Long name} & \textbf{Description} \\
\endfirsthead
\hline
\textbf{Name} & \textbf{Width} & \textbf{Long name} & \textbf{Description} \\
\endhead
\hline
\texttt{hirq} & 256 bits & Host Interrupt ReQuest & One bit per DSP Unit, directly wired to its active high input interrupt request \\
\hline
\end{longtable}
}
%%% \bfDocCrossbarHirq : hirq register doc text
\newcommand{\bfDocCrossbarHirq}{}
%%% \bfTableCrossbarConfig : config register fields table
\newcommand{\bfTableCrossbarConfig}[1][withlabel]{ % one optional argument empty by default; empty => label, else => no label
\def\withlabel{withlabel}
\def\wowolabel{#1}
\begin{longtable}{|p{0.1\textwidth}|p{0.1\textwidth}|p{0.2\textwidth}|p{0.6\textwidth}|}
\caption{\texttt{config} register fields (host address \texttt{0xFFF60})}\ifx\wowolabel\withlabel\relax\label{tab:crossbar_config_fields}\fi\\
\hline
\textbf{Name} & \textbf{Width} & \textbf{Long name} & \textbf{Description} \\
\endfirsthead
\hline
\textbf{Name} & \textbf{Width} & \textbf{Long name} & \textbf{Description} \\
\endhead
\hline
\texttt{irqtm} & 1 bits & Interrupt ReQuest Trigger Mode & Specifies the edge- (0) or level- (1) triggering of the interrupt request sent to the host \\
\hline
\end{longtable}
}
%%% \bfDocCrossbarConfig : config register doc text
\newcommand{\bfDocCrossbarConfig}{}
%%% \bfTableCrossbarStatus : status register fields table
\newcommand{\bfTableCrossbarStatus}[1][withlabel]{ % one optional argument empty by default; empty => label, else => no label
\def\withlabel{withlabel}
\def\wowolabel{#1}
\begin{longtable}{|p{0.1\textwidth}|p{0.1\textwidth}|p{0.2\textwidth}|p{0.6\textwidth}|}
\caption{\texttt{status} register fields (host address \texttt{0xFFF68})}\ifx\wowolabel\withlabel\relax\label{tab:crossbar_status_fields}\fi\\
\hline
\textbf{Name} & \textbf{Width} & \textbf{Long name} & \textbf{Description} \\
\endfirsthead
\hline
\textbf{Name} & \textbf{Width} & \textbf{Long name} & \textbf{Description} \\
\endhead
\hline
\texttt{irqi} & 16 bits & Interrupt Index & Specify the index of the highest priority interrupt. \\
\hline
\texttt{irqv} & 1 bits & Interrupt Valid & When set, indicate a valid interrupt, interrupt index can be taken into account. \\
\hline
\end{longtable}