The AXI simple bridge is a very simple hardware component with 2 slave AXI interfaces and 1 master AXI interface. Its main function is to forward AXI requests on one of its slave AXI interfaces to its AXI master interface. The AXI simple bridge can be ported on any board based on Xilinx [Zynq] cores but has been specifically designed for the ZedBoard prototyping board.
Xilinx Zynq cores embed a ARM processor and all its usual peripherals (USB, Ethernet, flash...) including external memory controllers. This part forms what is named Processing System (PS) in Xilinx terminology. Zynq cores also embed an FPGA matrix, the Programmable Logic (PL).
This page explains how to configure the PL and the software stack on a ZedBoard to boot a Linux kernel with all accesses to the external DDR flowing through the AXI simple bridge in the PL.
SD Card: A SD card archive for ZedBoard (boot image, Linux kernels, device tree blobs, initramfs root file systems with networking, python...)
In Zynq cores, the Processing System (PS) usually accesses its external DDR memory in the [0x0000_0000, 0x4000_0000[ address range (Regular Address Space or RAS in the following). In order to monitor or process the memory accesses, it would be convenient to route them to the Programmable Logic (PL), instead. If this was possible, one could simply configure the PL to implement the desired processing and instruct the PS to access its DDR through the PL. Of course, in order for this to work, the PL would have to route the accesses from the to the DDR and the DDR responses back to the PS. The kind of processing implemented in the PL can be anything from no processing, monitoring, tracing, cryptography...
Indeed, thanks to the Zynq architecture and its quite dense PS-PL interface, it is possible. The SecBus HSM uses this organization to implement cryptographic processing of the memory accesses (encryption, integrity checking). The AXI simple bridge presented here implements only a very simple monitoring of the AXI transactions: it counts them. The AXI simple bridge behaves a bit like a disabled SecBus HSM. This is the first reason why it has been developed: preparing the ground for the complete demonstration of SecBus on the ZedBoard.
The PS and the PL communicate through a set of AXI interfaces. The AXI simple bridge uses 3 of them:
AXI_GP0: 32 bits, master: PS, slave: PL, mapped in the [0x4000_0000, 0x8000_0000[ address range (Alternate Address Space or AAS in the following). The PS uses this interface to access the DDR through the bridge.
AXI_GP1: 32 bits, master: PS, slave: PL, mapped in the [0x8000_0000, 0xc000_0000[ address range (Control Address Space or CAS in the following). The PS uses this interface to access the bridge internal registers. These registers are mainly used for debugging (AXI transaction counters, programmable LED activity...).
AXI_HP0: 32 or 64 bits, master: PL, slave: PS. Configured in 32 bits width. The bridge routes all PS requests falling in the AAS, that is, received on the AXI_GP0 interface, to AXI_HP0. The addresses from AXI_GP0 requests are added the value of the 32 bits OFFSET register (modulus 2^32^) before being routed to AXI_HP0. This way, accessing an address A in the [0x4000_0000, 0x8000_0000[ range is the same as accessing A+OFFSET, except that it is routed through the PL. The default (reset) value of OFFSET is 0xc0100000, which translates the [0x4000_0000, 0x8000_0000[ range to [0x0010_0000, 0x4010_0000[. This default value has not been chosen randomly. Please read the Application Notes section of the AXI simple bridge documentation for explanations.
Prepare a SD card from which the ZedBoard will boot. Create a FAT32 first partition and make it large enough for the provided archive (you can create more partitions if you wish). Mount it on your host PC. In the following we assume its mount point is /media/SDCard.
Log in either as root or the regular secbus user (password secbus in both cases) and start interacting with the bridge. You can observe the bridge activity thanks to its internal registers. Please read the documentation for detailed information about them. Several aliases are defined to ease the interactions with the bridge, as summarized in the /mnt/README file.
The running busybox has the devmem applet built in, so accessing physical addresses can be done using devmem. The secbus regular user has devmem privilege.
The SD card partition from which the system booted is mounted on /mnt, so, if you added some custom files on the SD card, they are in /mnt.
The bitstream embeds a Chipscope Integrated Logic Analyzer core allowing to observe the AXI signals from Vivado.