Explore projects
-
Updated
-
Renaud Pacalet / sab4z
CeCILL Free Software License Agreement v2.1A simple example design for Zynq-based boards. VHDL design of custom HW mapped in Programmable Logic, Linux - Busybox - Buildroot SW stack, user SW applications interacting with custom hardware, Linux drivers, SW and HW debugging.
Updated -
Updated
-
Updated
-
Updated
-
Renaud Pacalet / secbus
CeCILL Free Software License Agreement v2.1A hardware / software architecture protecting the external memories of an SoC
Updated -
Cédric Ware / cours.td-kaya
Creative Commons Attribution-NonCommercial-ShareAlike 2.0 FranceTD équation de Kaya, transition énergétique et développement durable
Updated -
Code archive for the paper Does Functional Package Management Enable Reproducible Builds at Scale? Yes.
Updated