TTool (pronounced "tea-tool") is a toolkit dedicated to the edition of UML and SysML diagrams, and to the simulation and formal verification (safety, security, performance) of those diagrams. See ttool.telecom-paristech.fr and @TTool_UML_SysML

RAMSES (Refinement of AADL Models for Synthesis of Embedded Systems) is a model transformation and code generation tool that produces C code for ARINC653-compliant operating systems and OSEK-compliant operating systems.

API pour communication avec carte Mifare DESFire EV1

Modèle pour la génération de supports de cours (poly+slides) au format html, pdf et même docx à partir d'une source unique (au format markdown/pandooc).

simple python script to convert Synapses csv schedules to ics calendars.

Modèle de présentation Beamer + Modèle de Poster aux couleur de TPT

A simple example design for Zynq Ultrascale+ based boards.

Présentation de l'offre de service de la DSI

Model synchronization between Adele and OSATE with MoTE TGG.

This project provides utility libraries that can be used by several MBE tools such as RAMSES, TTool or RDALTE

This project contains the ontological framework developed during the MPM4CPS COST Action IC1404 () by working group 1 on foundations for MPM4CPS (http://mpm4cps.eu/).

A simple example design for Zynq-based boards. VHDL design of custom HW mapped in Programmable Logic, Linux - Busybox - Buildroot SW stack, user SW applications interacting with custom hardware, Linux drivers, SW and HW debugging.