GitLab

TTool (pronounced "tea-tool") is a toolkit dedicated to the edition of UML and SysML diagrams, and to the simulation and formal verification (safety, security, performance) of those diagrams. See ttool.telecom-paris.fr and @TTool_UML_SysML

RAMSES (Refinement of AADL Models for Synthesis of Embedded Systems) is a model transformation and code generation tool that produces C code for ARINC653-compliant operating systems and OSEK-compliant operating systems.

Modèle de présentation Beamer + Modèle de Poster aux couleur de TPT

API pour communication avec carte Mifare DESFire EV1

Nouveau thème Beamer aux couleur de Télécom Paris

simple python script to convert Synapses csv schedules to ics calendars.

Modèle pour la génération de supports de cours (poly+slides) au format html, pdf et même docx à partir d'une source unique (au format markdown/pandooc).

Modified version of QEMU for teaching (M2 SETI Embedded Linux, SE758 Linux Device Drivers...).

16 nibbles (64 bits) parallel sboxes using Xilinx CFGLUT5 primitive

A hardware / software architecture protecting the external memories of an SoC

SAR Image Despeckling by Deep Neural Networks: from a pre-trained model to an end-to-end training strategy - Notebook implementation usable on Google Colaboratory

Nouveau thème Beamer aux couleur de Télécom Paris

A simple example design for Zynq-based boards. VHDL design of custom HW mapped in Programmable Logic, Linux - Busybox - Buildroot SW stack, user SW applications interacting with custom hardware, Linux drivers, SW and HW debugging.