Merge branch 'master' of gitlab.enst.fr:mbe-tools/TTool

build.txt

-13195
\ No newline at end of file
+13197
\ No newline at end of file

simulators/c++2/src_simulator/arch/FPGA.cpp

@@ -367,6 +367,16 @@ std::string FPGA::toShortString() const{
   return outp.str();
 }
 
+void FPGA::reset(){
+  SchedulableDevice::reset();
+  _scheduler->reset();
+  _transactList.clear();
+  _nextTransaction=0;
+  _lastTransaction=0;
+  _masterNextTransaction=0;
+  _busyCycles=0;
+}
+
 void FPGA::schedule2TXT(std::ofstream& myfile) const{
   myfile << "========= Scheduling for device: "<< _name << " =========\n" ;
   for(TransactionList::const_iterator i=_transactList.begin(); i != _transactList.end(); ++i){

simulators/c++2/src_simulator/arch/FPGA.h

@@ -119,6 +119,7 @@ public:
 	virtual void addBusMaster(BusMaster* iMaster){
 		_busMasterList.push_back(iMaster);
 	}
+    virtual void reset();
 	///Stores a new task in the internal task list
 	/**
       	\param iTask Pointer to the task to add

simulators/c++2/src_simulator/arch/OrderScheduler.cpp

@@ -49,39 +49,41 @@ OrderScheduler::OrderScheduler(const std::string& iName, Priority iPrio, Workloa
 TMLTime OrderScheduler::schedule(TMLTime iEndSchedule){
   std::cout<<"order scheduler "<<std::endl;
 	TaskList::iterator i;
-	TMLTransaction *aMarkerPast=0, *aMarkerFuture=0,*aTempTrans;
-	TMLTime aTransTimeFuture=-1,aRunnableTime;
-	WorkloadSource *aSourcePast=0, *aSourceFuture=0;  //NEW
-	for(WorkloadList::iterator i=_workloadList.begin(); i != _workloadList.end(); ++i){
-		aTempTrans=(*i)->getNextTransaction(iEndSchedule);
-		//	if(aTempTrans) std::cout<<"show temp trans"<<aTempTrans->toShortString()<<std::endl;
-		if (aTempTrans!=0 && aTempTrans->getVirtualLength()!=0 && aTempTrans->getCommand()->getTask()->getFPGA()){
-			aRunnableTime=aTempTrans->getRunnableTime();	
-			if (aRunnableTime<=iEndSchedule){
-			  //Past
 
-			  aMarkerPast=aTempTrans;
-			  aSourcePast=*i; //NEW
-		        
-			}else{
-			  //Future
-		        
-			  aTransTimeFuture=aRunnableTime;
-			  aMarkerFuture=aTempTrans;
-			  aSourceFuture=*i; //NEW
-		        
-				
-			}
-		}
-		     
-	}
-	if (aMarkerPast==0){
-		_nextTransaction=aMarkerFuture;
-		_lastSource=aSourceFuture; //NEW
-	}else{
-		_nextTransaction=aMarkerPast;
-		_lastSource=aSourcePast; //NEW
-	}
+    //std::cout << _name << ": Schedule called \n";
+    TMLTransaction *anOldTransaction = _nextTransaction, *aTempTrans;
+    TMLTime aLowestRunnableTimeFuture=-1, aRunnableTime, aLowestRunnableTimePast=-1;
+    WorkloadSource *aSourcePast=0, *aSourceFuture=0;
+        //std::cout << _name << ": Second if\n";
+        for(WorkloadList::iterator i=_workloadList.begin(); i != _workloadList.end(); ++i){
+             (*i)->schedule(iEndSchedule);
+            //std::cout << _name << " schedules, before getCurrTransaction " << std::endl;
+            aTempTrans=(*i)->getNextTransaction(iEndSchedule);
+            //std::cout << "after getCurrTransaction " << std::endl;
+            if (aTempTrans!=0 && aTempTrans->getVirtualLength()!=0){
+                aRunnableTime=aTempTrans->getRunnableTime();
+                if (aRunnableTime<=iEndSchedule){
+                    //Past
+                    if (aRunnableTime<aLowestRunnableTimePast){
+                        aLowestRunnableTimePast=aRunnableTime;
+                        aSourcePast=*i;
+                    }
+                }else{
+                    //Future
+                    if(aRunnableTime<aLowestRunnableTimeFuture){
+                        aLowestRunnableTimeFuture=aRunnableTime;
+                        aSourceFuture=*i;
+                    }
+                }
+            }
+        }
+    	if (aSourcePast==0){
+    		_nextTransaction=(aSourceFuture==0)? 0 : aSourceFuture->getNextTransaction(iEndSchedule);
+    		_lastSource=aSourceFuture;
+    	}else{
+    		_nextTransaction=aSourcePast->getNextTransaction(iEndSchedule);
+    		_lastSource=aSourcePast;
+    	}
 #ifdef DEBUG_FPGA
 	if(_nextTransaction) std::cout<<"order next trans is "<<_nextTransaction->toShortString()<<std::endl;
 	else std::cout<<"order next trans is 0"<<std::endl;

simulators/c++2/src_simulator/evt/ListenersSimCmd.cpp

@@ -49,6 +49,7 @@ Ludovic Apvrille, Renaud Pacalet
 #include <TMLTask.h>
 #include <dlfcn.h>
 #include <CPU.h>
+#include <FPGA.h>
 #define COND_SOURCE_FILE_NAME "newlib.c"
 #define COND_OBJ_FILE_NAME "newlib.o"
 
@@ -60,12 +61,16 @@ bool CondBreakpoint::_enabled=true;
 //************************************************************************
 RunXTransactions::RunXTransactions(SimComponents* iSimComp, unsigned int iTransToExecute):_simComp(iSimComp), _count(0), _transToExecute(iTransToExecute){
 	for(CPUList::const_iterator i=_simComp->getCPUList().begin(); i != _simComp->getCPUList().end(); ++i)
-		(*i)->registerListener(this);	
+		(*i)->registerListener(this);
+	for(FPGAList::const_iterator j=_simComp->getFPGAList().begin(); j != _simComp->getFPGAList().end(); ++j)
+        (*j)->registerListener(this);
 }
 
 RunXTransactions::~RunXTransactions(){
 	for(CPUList::const_iterator i=_simComp->getCPUList().begin(); i != _simComp->getCPUList().end(); ++i)
 		(*i)->removeListener(this);
+    for(FPGAList::const_iterator j=_simComp->getFPGAList().begin(); j != _simComp->getFPGAList().end(); ++j)
+        (*j)->removeListener(this);
 }
 
 void RunXTransactions::transExecuted(TMLTransaction* iTrans, ID iID){
@@ -248,12 +253,16 @@ void RunXCommands::setCmdsToExecute(unsigned int iCommandsToExecute){
 //************************************************************************
 RunXTimeUnits::RunXTimeUnits(SimComponents* iSimComp, TMLTime iEndTime):_simComp(iSimComp), _endTime(iEndTime){
 	for(CPUList::const_iterator i=_simComp->getCPUList().begin(); i != _simComp->getCPUList().end(); ++i)
-		(*i)->registerListener(this);	
+		(*i)->registerListener(this);
+    for(FPGAList::const_iterator j=_simComp->getFPGAList().begin(); j != _simComp->getFPGAList().end(); ++j)
+		(*j)->registerListener(this);
 }
 
 RunXTimeUnits::~RunXTimeUnits(){
 	for(CPUList::const_iterator i=_simComp->getCPUList().begin(); i != _simComp->getCPUList().end(); ++i)
 		(*i)->removeListener(this);
+    for(FPGAList::const_iterator j=_simComp->getFPGAList().begin(); j != _simComp->getFPGAList().end(); ++j)
+        (*j)->removeListener(this);
 }
 
 void RunXTimeUnits::transExecuted(TMLTransaction* iTrans, ID iID){

src/main/java/ui/util/DefaultText.java

@@ -50,8 +50,8 @@ package ui.util;
  */
 public class DefaultText {
 
-    public static String BUILD = "13194";
-    public static String DATE = "2019/10/15 03:04:27 CET";
+    public static String BUILD = "13196";
+    public static String DATE = "2019/10/17 03:04:24 CET";
 
     public static StringBuffer sbAbout = makeAbout();