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Commit 2c448b5e authored by Andrea Enrici's avatar Andrea Enrici
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parents 8f256335 c26b4059
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#include "my_hwa0.h"
namespace dsx { namespace caba {
#define tmpl(...) __VA_ARGS__ MyHWA0
tmpl(/**/)::~MyHWA0()
{
}
tmpl(/**/)::MyHWA0(sc_core::sc_module_name insname)
:dsx::caba::FifoVirtualCoprocessorWrapper(insname, stringArray("output", NULL), intArray(1, 8), stringArray("input", NULL), intArray(1, 8))
{
}
tmpl(void *)::task_func() {
srl_mwmr_t input = SRL_GET_MWMR(input);
srl_mwmr_t output = SRL_GET_MWMR(output);
uint32_t in0[8];
uint32_t in1[8];
uint32_t out[8];
while (true) {
// srl_mwmr_read(input0, &in0, 1); // Read 8 words from input0, i.e. 1 item since the fifo is 8-word wide
//srl_mwmr_read(input1, &in1, 1); // Read 8 words from input1
srl_mwmr_read(input, &in0, 1); //DG 4.9. corrige
srl_mwmr_read(input, &in1, 1); //DG 4.9. corrige
for (int32_t i = 0; i < 8; i++) {
out[i] = in0[i] + in1[i];
}
srl_busy_cycles(2); // The computation takes 2 cycles
srl_mwmr_write(output, &out, 1); // Write 8 words to output
}
}
}}
#ifndef _ADDER_COPRO_H
#define _ADDER_COPRO_H
#include <systemc>
#include "fifo_virtual_copro_wrapper.h"
namespace dsx { namespace caba {
class MyHWA0
: public dsx::caba::FifoVirtualCoprocessorWrapper
{
public:
~MyHWA0();
MyHWA0(sc_core::sc_module_name insname);
private:
void * task_func(); // Task code
};
}}
#endif /* _ADDER_COPRO_H */
#-*- python -*-
Module('caba:my_hwa0',
classname = 'dsx::caba::MyHWA0',
header_files = [
"my_hwa0.h",
],
interface_files = [
],
implementation_files = [
"my_hwa0.cpp",
],
ports = [
],
uses = [
Uses('caba:fifo_virtual_copro_wrapper'),
],
instance_parameters = [
],
tmpl_parameters = [
],
extensions = [
],
)
......@@ -171,16 +171,17 @@ public class MappingTable {
/* Instanciation of the MWMR wrappers for hardware accellerators */
/* The accelerators themselves are specifies on DIPLODOCUS level */
int count = l+5;
int hwa_count=0;
int MWMR_SIZE=4096;
int MWMRd_SIZE=12288;
// int MWMR_BASE=0xA0200000;
i=0;
for (AvatarCoproMWMR MWMRwrapper : TopCellGenerator.avatardd.getAllCoproMWMR()) {
mapping += "maptab.add(Segment(\"mwmr_ram"+hwa_count+"\", 0xA0"+ Integer.toHexString(2097152+MWMR_SIZE*i)+", 0x00001000, IntTab("+(l+5+hwa_count)+"), false));" + CR;
//mapping += "maptab.add(Segment(\"mwmrd_ram"+hwa_count+"\", 0xA0"+ Integer.toHexString(2097152+MWMR_SIZE*i)+", 0x00001000, IntTab("+(l+5+hwa_count2)+"), false));" + CR;
hwa_count++;
mapping += "maptab.add(Segment(\"mwmr_ram"+hwa_count+"\", 0xA0"+ Integer.toHexString(2097152+MWMR_SIZE*i)+", 0x00001000, IntTab("+count+"), false));" + CR;
mapping += "maptab.add(Segment(\"mwmrd_ram"+hwa_count+"\", 0x20"+ Integer.toHexString(2097152+MWMRd_SIZE*i)+", 0x00003000, IntTab("+(count+1)+"), false));" + CR;
hwa_count++;
count+=2;
}
hwa_count=0;
......
......@@ -222,18 +222,47 @@ public class NetList {
}
if(nb_clusters==0){
/* we can have several TTYs and each is associated to the fdtrom */
if(icn=="vgmn"){
// we can have several TTYs and each is associated to the fdtrom
/* if(icn=="vgmn"){
netlist = netlist + "vgmn.p_to_target["+(TopCellGenerator.avatardd.getNb_target())+"](signal_vci_vcifdaccesst);" + CR;
netlist = netlist + "vgmn.p_to_target["+(TopCellGenerator.avatardd.getNb_target()+1)+"](signal_vci_ethernett);" + CR;
netlist = netlist + "vgmn.p_to_target["+(TopCellGenerator.avatardd.getNb_target()+2)+"](signal_vci_bdt);" + CR;
netlist = netlist + "vgmn.p_to_target["+(TopCellGenerator.avatardd.getNb_target()+3)+"](signal_vci_vcilocks);" + CR;
}else{ /* vgsb */
}else{ //vgsb
netlist = netlist + "vgsb.p_to_target["+(TopCellGenerator.avatardd.getNb_target())+"](signal_vci_vcifdaccesst);" + CR;
netlist = netlist + "vgsb.p_to_target["+(TopCellGenerator.avatardd.getNb_target()+1)+"](signal_vci_ethernett);" + CR;
netlist = netlist + "vgsb.p_to_target["+(TopCellGenerator.avatardd.getNb_target()+2)+"](signal_vci_bdt);" + CR;
netlist = netlist + "vgsb.p_to_target["+(TopCellGenerator.avatardd.getNb_target()+3)+"](signal_vci_vcilocks);" + CR;
}
}*/
int l=8; //number of last tty ToDo
if(icn=="vgmn"){
netlist = netlist + "vgmn.p_to_target["+(l)+"](signal_vci_vcifdaccesst);" + CR;
netlist = netlist + "vgmn.p_to_target["+(l+1)+"](signal_vci_ethernett);" + CR;
netlist = netlist + "vgmn.p_to_target["+(l+2)+"](signal_vci_bdt);" + CR;
netlist = netlist + "vgmn.p_to_target["+(l+3)+"](signal_vci_vcilocks);" + CR;
int i;
//DG 14.09.
int coproc_count=0;
for(i=0;i<coproc_count;i++){
netlist = netlist + "vgmn.p_to_target["+(l+4+i)+"](signal_mwmr_"+i+"_target);" + CR;
}
}else{ //vgsb
netlist = netlist + "vgsb.p_to_target["+(l)+"](signal_vci_vcifdaccesst);" + CR;
netlist = netlist + "vgsb.p_to_target["+(l+1)+"](signal_vci_ethernett);" + CR;
netlist = netlist + "vgsb.p_to_target["+(l+2)+"](signal_vci_bdt);" + CR;
netlist = netlist + "vgsb.p_to_target["+(l+3)+"](signal_vci_vcilocks);" + CR;
//DG 14.09.
int coproc_count=0;
int i;
for(i=0;i<coproc_count;i++){
netlist = netlist + "vgmn.p_to_target["+(l+4+i)+"](signal_mwmr_"+i+"_target);" + CR;
}
}
}else{
/* cluster case */
if(icn=="vgmn"){
......@@ -340,6 +369,8 @@ public class NetList {
////////////////MWMR controller; hypothesis 1 per coprocessor
// if(nb_cluster == 0){
i=0;
int coproc_count=0;
for (AvatarCoproMWMR copro : TopCellGenerator.avatardd.getAllCoproMWMR()){
//a coprocessor with its FIFO interface built from HWA
netlist = netlist +"hwa"+i+".p_clk(signal_clk);" + CR;
......@@ -358,6 +389,7 @@ netlist = netlist +copro.getCoprocName() +".p_to_coproc["+i+"](signal_fifo_"+i+"
// netlist = netlist +copro.getCoprocName() +".status();" + CR;
// netlist = netlist +copro.getCoprocName() +".config();" + CR;
i++;
coproc_count++;
}
......
......@@ -62,16 +62,16 @@ public class CAMSConnection{
public int rate;
public int type;
public CAMSConnection(CAMSBlocks _inputBlock, CAMSBlock _outputBlock){
public CAMSConnection(CAMSBlocks _inputBlock, CAMSBlocks _outputBlock){
inputBlock = _inputBlock;
outputBlock = _outputBlock;
}
public CAMSBlock getInputBlock(){
public CAMSBlocks getInputBlock(){
return inputBlock;
}
public CAMSBlock getOutputBlock(){
public CAMSBlocks getOutputBlock(){
return outputBlock;
}
......
......@@ -52,6 +52,7 @@ import java.util.List;
public class CAMSSpecification{
public int nb_target, nb_init;
private List<CAMSBlocks> blocks;
private List<CAMSSignal> signals;
......@@ -66,11 +67,11 @@ public class CAMSSpecification{
nb_init = _nb_init;
}
public List<CAMSBlock> getBlock(){
public List<CAMSBlocks> getBlock(){
return blocks;
}
public List<CAMSSignals> getSignals(){
public List<CAMSSignal> getSignals(){
return signals;
}
......@@ -79,9 +80,9 @@ public class CAMSSpecification{
}
public List<CAMSBlocks> getUnconnectedBlocks(){
List<CAMSBlocks> unconnectedBlocks;
/* List<CAMSBlocks> unconnectedBlocks;
for(CAMSBlocks block : blocks){
for(CAMSConnections connection : connections){
for(CAMSConnection connection : connections){
if (block == connection.getInputBlock() || block == connection.getOutputBlock()){
break;
}
......@@ -90,13 +91,11 @@ public class CAMSSpecification{
}
}
}
return unconnectedBlocks;
return unconnectedBlocks;*/
}
public list<CAMSSignals> getunconnectedSignals(){
list<CAMSSignals> unconnectedSignals;
public List<CAMSSignal> getunconnectedSignals(){
/* List<CAMSSignal> unconnectedSignals;*/
return unconnectedSignals;
}
}
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