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mbe-tools
TTool
Commits
471bdcc5
Commit
471bdcc5
authored
6 years ago
by
apvrille
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6508473c
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2 changed files
src/main/java/syscamstranslator/toSysCAMS/Loader.java
+0
-148
0 additions, 148 deletions
src/main/java/syscamstranslator/toSysCAMS/Loader.java
src/main/java/syscamstranslator/toSysCAMS/TopCellGenerator.java
+133
-132
133 additions, 132 deletions
...in/java/syscamstranslator/toSysCAMS/TopCellGenerator.java
with
133 additions
and
280 deletions
src/main/java/syscamstranslator/toSysCAMS/Loader.java
deleted
100644 → 0
+
0
−
148
View file @
6508473c
/* Copyright or (C) or Copr. GET / ENST, Telecom-Paris, Ludovic Apvrille
* Daniela Genius, Lip6, UMR 7606
*
* ludovic.apvrille AT enst.fr
* daniela.genius@lip6.fr
*
* This software is a computer program whose purpose is to allow the
* edition of TURTLE analysis, design and deployment diagrams, to
* allow the generation of RT-LOTOS or Java code from this diagram,
* and at last to allow the analysis of formal validation traces
* obtained from external tools, e.g. RTL from LAAS-CNRS and CADP
* from INRIA Rhone-Alpes.
*
* This software is governed by the CeCILL license under French law and
* abiding by the rules of distribution of free software. You can use,
* modify and/ or redistribute the software under the terms of the CeCILL
* license as circulated by CEA, CNRS and INRIA at the following URL
* "http://www.cecill.info".
*
* As a counterpart to the access to the source code and rights to copy,
* modify and redistribute granted by the license, users are provided only
* with a limited warranty and the software's author, the holder of the
* economic rights, and the successive licensors have only limited
* liability.
*
* In this respect, the user's attention is drawn to the risks associated
* with loading, using, modifying and/or developing or reproducing the
* software by the user in light of its specific status of free software,
* that may mean that it is complicated to manipulate, and that also
* therefore means that it is reserved for developers and experienced
* professionals having in-depth computer knowledge. Users are therefore
* encouraged to load and test the software's suitability as regards their
* requirements in conditions enabling the security of their systems and/or
* data to be ensured and, more generally, to use and operate it in the
* same conditions as regards security.
*
* The fact that you are presently reading this means that you have had
* knowledge of the CeCILL license and that you accept its terms.
*/
/* authors: v1.0 Daniela GENIUS, Julien HENON 2015 */
package
syscamstranslator.toSysCAMS
;
import
avatartranslator.AvatarRelation
;
//DG 23.06.
import
avatartranslator.AvatarSpecification
;
//DG 23.06.
import
ddtranslatorSoclib.AvatarChannel
;
public
class
Loader
{
public
static
AvatarSpecification
avspec
;
static
private
String
loader
;
private
final
static
String
NAME_CLK
=
"signal_clk"
;
private
final
static
String
CR
=
"\n"
;
private
final
static
String
CR2
=
"\n\n"
;
public
Loader
(
AvatarSpecification
_avspec
){
avspec
=
_avspec
;
}
public
static
String
getLoader
(
AvatarSpecification
_avspec
)
{
//DG 23.06.
avspec
=
_avspec
;
//DG 23.06.
int
nb_clusters
=
TopCellGenerator
.
syscams
.
getAllCrossbar
().
size
();
//nb_clusters=2;
loader
=
CR2
+
"//-------------------------Call Loader---------------------------------"
+
CR2
;
loader
=
loader
+
"std::cerr << \"caba-vgmn-mutekh_kernel_tutorial SoCLib simulator for MutekH\" << std::endl;"
+
CR2
;
loader
=
loader
+
"if ( (argc < 2) || ((argc % 2) == 0) ) {"
+
CR
;
loader
=
loader
+
"exit(0); }"
+
CR
;
loader
=
loader
+
" argc--;"
+
CR
;
loader
=
loader
+
" argv++;"
+
CR2
;
loader
=
loader
+
"bool heterogeneous = (argc > 2);"
+
CR2
;
loader
=
loader
+
" for (int i = 0; i < (argc - 1); i += 2){"
+
CR
;
loader
=
loader
+
" char *cpu_p = argv[i];"
+
CR
;
loader
=
loader
+
" const char *kernel_p = argv[i+1];"
+
CR
;
loader
=
loader
+
" const char *arch_str = strsep(&cpu_p, \":\");"
+
CR
;
loader
=
loader
+
" int count = cpu_p ? atoi(cpu_p) : 1;"
+
CR
;
loader
=
loader
+
" common::Loader *text_ldr; "
+
CR
;
loader
=
loader
+
" if (heterogeneous) {"
+
CR
;
loader
=
loader
+
" text_ldr = new common::Loader(std::string(kernel_p) + \";.text\");"
+
CR
;
loader
=
loader
+
" text_ldr->memory_default(0x5a);;"
+
CR
;
loader
=
loader
+
" data_ldr.load_file(std::string(kernel_p) + \";.rodata;.boot;.excep\");"
+
CR
;
loader
=
loader
+
" if (i == 0)"
+
CR
;
loader
=
loader
+
" data_ldr.load_file(std::string(kernel_p) + \";.data;"
;
// We generated so far until arriving at first channel segment, if any
//current hypothesis : one segment per channel
int
j
=
0
;
//for (AvatarChannel channel : TopCellGenerator.avatardd.getAllMappedChannels()) {
//DG 23.06. per signal!!hack pour l'instant
int
i
=
0
;
//for (i=0;i<30;i++){
for
(
AvatarRelation
ar:
avspec
.
getRelations
())
{
for
(
i
=
0
;
i
<
ar
.
nbOfSignals
()
;
i
++)
{
loader
=
loader
+
".channel"
+
j
+
";"
;
j
++;
}
}
// We resume the generation of the fixed code
loader
=
loader
+
".cpudata;.contextdata\");"
+
CR
;
loader
=
loader
+
" } else {"
+
CR
;
loader
=
loader
+
" text_ldr = new common::Loader(std::string(kernel_p));"
+
CR
;
loader
=
loader
+
" text_ldr->memory_default(0x5a);"
+
CR
;
loader
=
loader
+
" data_ldr.load_file(std::string(kernel_p));"
+
CR
;
loader
=
loader
+
" }"
+
CR2
;
loader
=
loader
+
" common::Loader tools_ldr(kernel_p);"
+
CR
;
loader
=
loader
+
" tools_ldr.memory_default(0x5a);"
+
CR2
;
loader
=
loader
+
" for (int j = 0; j < count; j++) {"
+
CR
;
loader
=
loader
+
" int id = cpus.size();"
+
CR
;
loader
=
loader
+
" std::cerr << \"***\" << cpus.size() << std::endl;"
+
CR
;
loader
=
loader
+
" CpuEntry *e = newCpuEntry(arch_str, id, text_ldr);"
+
CR
;
loader
=
loader
+
" if (j == 0)"
+
CR
;
loader
=
loader
+
" e->init_tools(tools_ldr);"
+
CR
;
loader
=
loader
+
" e->cpu = e->new_cpu(e);"
+
CR
;
loader
=
loader
+
" cpus.push_back(e);"
+
CR
;
loader
=
loader
+
" }"
+
CR
;
loader
=
loader
+
" }"
+
CR2
;
int
nb_tty
=
1
;
//DG currently only one (multi) tty
if
(
nb_clusters
==
0
){
loader
=
loader
+
" const size_t xicu_n_irq = "
+(
1
+
nb_tty
+
3
)+
";"
+
CR2
;
}
else
{
loader
=
loader
+
" const size_t xicu_n_irq = "
+(
5
*
nb_clusters
)+
";"
+
CR2
;
}
return
loader
;
}
String
getNAME_CLK
(){
return
NAME_CLK
;
}
}
This diff is collapsed.
Click to expand it.
src/main/java/syscamstranslator/toSysCAMS/TopCellGenerator.java
+
133
−
132
View file @
471bdcc5
/**Copyright or (C) or Copr. GET / ENST, Telecom-Paris, Ludovic Apvrille
/**
Daniela Genius, Lip6, UMR 7606
* Copyright or (C) or Copr. GET / ENST, Telecom-Paris, Ludovic Apvrille
* Daniela Genius, Lip6, UMR 7606
ludovic.apvrille AT enst.fr
* <p>
daniela.genius@lip6.fr
* ludovic.apvrille AT enst.fr
* daniela.genius@lip6.fr
This software is a computer program whose purpose is to allow the
* <p>
edition of TURTLE analysis, design and deployment diagrams, to
* This software is a computer program whose purpose is to allow the
allow the generation of RT-LOTOS or Java code from this diagram,
* edition of TURTLE analysis, design and deployment diagrams, to
and at last to allow the analysis of formal validation traces
* allow the generation of RT-LOTOS or Java code from this diagram,
obtained from external tools, e.g. RTL from LAAS-CNRS and CADP
* and at last to allow the analysis of formal validation traces
from INRIA Rhone-Alpes.
* obtained from external tools, e.g. RTL from LAAS-CNRS and CADP
* from INRIA Rhone-Alpes.
This software is governed by the CeCILL license under French law and
* <p>
abiding by the rules of distribution of free software. You can use,
* This software is governed by the CeCILL license under French law and
modify and/ or redistribute the software under the terms of the CeCILL
* abiding by the rules of distribution of free software. You can use,
license as circulated by CEA, CNRS and INRIA at the following URL
* modify and/ or redistribute the software under the terms of the CeCILL
"http://www.cecill.info".
* license as circulated by CEA, CNRS and INRIA at the following URL
* "http://www.cecill.info".
As a counterpart to the access to the source code and rights to copy,
* <p>
modify and redistribute granted by the license, users are provided only
* As a counterpart to the access to the source code and rights to copy,
with a limited warranty and the software's author, the holder of the
* modify and redistribute granted by the license, users are provided only
economic rights, and the successive licensors have only limited
* with a limited warranty and the software's author, the holder of the
liability.
* economic rights, and the successive licensors have only limited
* liability.
In this respect, the user's attention is drawn to the risks associated
* <p>
with loading, using, modifying and/or developing or reproducing the
* In this respect, the user's attention is drawn to the risks associated
software by the user in light of its specific status of free software,
* with loading, using, modifying and/or developing or reproducing the
that may mean that it is complicated to manipulate, and that also
* software by the user in light of its specific status of free software,
therefore means that it is reserved for developers and experienced
* that may mean that it is complicated to manipulate, and that also
professionals having in-depth computer knowledge. Users are therefore
* therefore means that it is reserved for developers and experienced
encouraged to load and test the software's suitability as regards their
* professionals having in-depth computer knowledge. Users are therefore
requirements in conditions enabling the security of their systems and/or
* encouraged to load and test the software's suitability as regards their
data to be ensured and, more generally, to use and operate it in the
* requirements in conditions enabling the security of their systems and/or
same conditions as regards security.
* data to be ensured and, more generally, to use and operate it in the
* same conditions as regards security.
The fact that you are presently reading this means that you have had
* <p>
knowledge of the CeCILL license and that you accept its terms.
* The fact that you are presently reading this means that you have had
*/
* knowledge of the CeCILL license and that you accept its terms.
*/
/* Generator of the top cell for simulation with SoCLib virtual component
/* Generator of the top cell for simulation with SoCLib virtual component
library */
library */
...
@@ -46,79 +47,79 @@
...
@@ -46,79 +47,79 @@
package
syscamstranslator.toSysCAMS
;
package
syscamstranslator.toSysCAMS
;
import
syscamstranslator.*
;
import
syscamstranslator.SysCAMSSpecification
;
import
syscamstranslator.toSysCAMS.*
;
import
syscamstranslator.SysCAMSTBlockTDF
;
import
syscamstranslator.SysCAMSTCluster
;
import
ui.syscams.SysCAMSBlockTDF
;
import
ui.syscams.SysCAMSBlockTDF
;
import
java.io.
*
;
import
java.io.
File
;
import
java.
util.ArrayList
;
import
java.
io.FileWriter
;
import
java.util.LinkedList
;
import
java.util.LinkedList
;
import
java.util.List
;
import
java.util.List
;
public
class
TopCellGenerator
{
public
class
TopCellGenerator
{
// --------------- accessing Avatardd -----------------
// --------------- accessing Avatardd -----------------
public
static
SysCAMSSpecification
syscams
;
public
static
SysCAMSSpecification
syscams
;
// ---------------------------------------------------
// ---------------------------------------------------
public
String
VCIparameters
;
public
String
VCIparameters
;
public
String
config
;
public
String
config
;
public
String
mainFile
;
public
String
mainFile
;
public
String
src
;
public
String
src
;
public
String
top
;
public
String
top
;
public
String
deployinfo
;
public
String
deployinfo
;
public
String
deployinfo_map
;
public
String
deployinfo_map
;
public
String
deployinfo_ram
;
public
String
deployinfo_ram
;
public
String
platform_desc
;
public
String
platform_desc
;
public
String
procinfo
;
public
String
procinfo
;
public
String
nbproc
;
public
String
nbproc
;
public
final
String
DOTH
=
".h"
;
public
final
String
DOTH
=
".h"
;
public
final
String
DOTCPP
=
".cpp"
;
public
final
String
DOTCPP
=
".cpp"
;
public
final
String
SYSTEM_INCLUDE
=
"#include \"systemc.h\""
;
public
final
String
SYSTEM_INCLUDE
=
"#include \"systemc.h\""
;
public
final
String
CR
=
"\n"
;
public
final
String
CR
=
"\n"
;
public
final
String
CR2
=
"\n\n"
;
public
final
String
CR2
=
"\n\n"
;
public
final
String
SCCR
=
";\n"
;
public
final
String
SCCR
=
";\n"
;
public
final
String
EFCR
=
"}\n"
;
public
final
String
EFCR
=
"}\n"
;
public
final
String
EFCR2
=
"}\n\n"
;
public
final
String
EFCR2
=
"}\n\n"
;
public
final
String
EF
=
"}"
;
public
final
String
EF
=
"}"
;
public
final
String
COTE
=
""
;
public
final
String
COTE
=
""
;
public
final
String
NAME_RST
=
"signal_resetn"
;
public
final
String
NAME_RST
=
"signal_resetn"
;
public
final
String
TYPEDEF
=
"typedef"
;
public
final
String
TYPEDEF
=
"typedef"
;
private
final
static
String
GENERATED_PATH
=
"generated_topcell"
+
File
.
separator
;
private
final
static
String
GENERATED_PATH
=
"generated_topcell"
+
File
.
separator
;
private
boolean
tracing
;
private
boolean
tracing
;
public
TopCellGenerator
(
SysCAMSSpecification
sys
,
boolean
_tracing
)
{
public
TopCellGenerator
(
SysCAMSSpecification
sys
,
boolean
_tracing
)
{
syscams
=
sys
;
syscams
=
sys
;
tracing
=
_tracing
;
tracing
=
_tracing
;
}
}
public
String
generateTopCell
(
SysCAMSTBlockTDF
tdf
)
{
public
String
generateTopCell
(
SysCAMSTBlockTDF
tdf
)
{
/* first test validity of the hardware platform */
/* first test validity of the hardware platform */
if
(
TopCellGenerator
.
syscams
.
getNbCluster
()
==
0
)
{
if
(
TopCellGenerator
.
syscams
.
getNbCluster
()
==
0
)
{
System
.
out
.
println
(
"***Warning: require at least one cluster***"
);
System
.
out
.
println
(
"***Warning: require at least one cluster***"
);
}
}
if
(
TopCellGenerator
.
syscams
.
getNbBlockTDF
()
==
0
)
{
if
(
TopCellGenerator
.
syscams
.
getNbBlockTDF
()
==
0
)
{
System
.
out
.
println
(
"***Warning: require at least one TDF block***"
);
System
.
out
.
println
(
"***Warning: require at least one TDF block***"
);
}
}
if
(
TopCellGenerator
.
syscams
.
getNbPortTDF
()
==
0
)
{
if
(
TopCellGenerator
.
syscams
.
getNbPortTDF
()
==
0
)
{
System
.
out
.
println
(
"***Warning: require at least one TDF port***"
);
System
.
out
.
println
(
"***Warning: require at least one TDF port***"
);
}
}
if
(
TopCellGenerator
.
syscams
.
getNbBlockDE
()
==
0
)
{
if
(
TopCellGenerator
.
syscams
.
getNbBlockDE
()
==
0
)
{
System
.
out
.
println
(
"***Warning: require at least one DE block***"
);
System
.
out
.
println
(
"***Warning: require at least one DE block***"
);
}
}
if
(
TopCellGenerator
.
syscams
.
getNbPortDE
()
==
0
)
{
if
(
TopCellGenerator
.
syscams
.
getNbPortDE
()
==
0
)
{
System
.
out
.
println
(
"***Warning: require at least one DE port***"
);
System
.
out
.
println
(
"***Warning: require at least one DE port***"
);
}
}
if
(
TopCellGenerator
.
syscams
.
getNbPortConverter
()
==
0
)
{
if
(
TopCellGenerator
.
syscams
.
getNbPortConverter
()
==
0
)
{
System
.
out
.
println
(
"***Warning: require at least one converter port***"
);
System
.
out
.
println
(
"***Warning: require at least one converter port***"
);
}
}
String
top
=
Header
.
getPrimitiveHeader
(
tdf
)
+
Body
.
getPrimitiveBody
(
tdf
);
String
top
=
Header
.
getPrimitiveHeader
(
tdf
)
+
Body
.
getPrimitiveBody
(
tdf
);
return
(
top
);
return
(
top
);
}
}
public
static
void
saveFile
(
String
path
)
{
public
static
void
saveFile
(
String
path
)
{
// try {
// try {
// System.err.println(path + GENERATED_PATH + "top.cc");
// System.err.println(path + GENERATED_PATH + "top.cc");
// FileWriter fw = new FileWriter(path + GENERATED_PATH + "/top.cc");
// FileWriter fw = new FileWriter(path + GENERATED_PATH + "/top.cc");
...
@@ -127,30 +128,30 @@ public class TopCellGenerator {
...
@@ -127,30 +128,30 @@ public class TopCellGenerator {
// fw.close();
// fw.close();
// } catch (IOException ex) {
// } catch (IOException ex) {
// }
// }
saveFileBlockTDF
(
path
);
saveFileBlockTDF
(
path
);
}
}
public
static
void
saveFileBlockTDF
(
String
path
)
{
public
static
void
saveFileBlockTDF
(
String
path
)
{
LinkedList
<
SysCAMSTCluster
>
clusters
=
TopCellGenerator
.
syscams
.
getAllCluster
();
LinkedList
<
SysCAMSTCluster
>
clusters
=
TopCellGenerator
.
syscams
.
getAllCluster
();
String
code
;
String
code
;
for
(
SysCAMSTCluster
c
:
clusters
)
{
for
(
SysCAMSTCluster
c
:
clusters
)
{
List
<
SysCAMSBlockTDF
>
tdf
=
c
.
getBlocks
();
List
<
SysCAMSBlockTDF
>
tdf
=
c
.
getBlocks
();
for
(
SysCAMSBlockTDF
t
:
tdf
)
{
for
(
SysCAMSBlockTDF
t
:
tdf
)
{
try
{
try
{
System
.
err
.
println
(
path
+
GENERATED_PATH
+
t
.
getValue
()
+
".h"
);
System
.
err
.
println
(
path
+
GENERATED_PATH
+
t
.
getValue
()
+
".h"
);
FileWriter
fw
=
new
FileWriter
(
path
+
GENERATED_PATH
+
"/"
+
t
.
getValue
()
+
".h"
);
FileWriter
fw
=
new
FileWriter
(
path
+
GENERATED_PATH
+
"/"
+
t
.
getValue
()
+
".h"
);
code
=
PrimitiveCode
.
getPrimitiveCode
(
t
);
code
=
PrimitiveCode
.
getPrimitiveCode
(
t
);
fw
.
write
(
code
);
fw
.
write
(
code
);
fw
.
close
();
fw
.
close
();
}
catch
(
Exception
ex
)
{
}
catch
(
Exception
ex
)
{
ex
.
printStackTrace
();
ex
.
printStackTrace
();
}
}
}
}
}
}
}
}
public
static
void
main
(
String
[]
args
)
{
public
static
void
main
(
String
[]
args
)
{
saveFile
(
"/main/syscamstranslator/"
);
saveFile
(
"/main/syscamstranslator/"
);
}
}
}
}
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