2fpgas communication ok

simulators/c++2/src_simulator/arch/FPGA.cpp

@@ -253,14 +253,19 @@ std::cout<<"fpga addTransaction"<<std::endl;
     std::cout<<"_maxEndTime is "<<_maxEndTime<<std::endl;
     
     std::cout<<"endschedule is!! "<<_endSchedule<<std::endl;
+    if(_nextTransaction==0) std::cout<<"000"<<std::endl;
 #endif
     _simulatedTime=max(_simulatedTime,_endSchedule);
     _overallTransNo++; //NEW!!!!!!!!
     _overallTransSize+=_nextTransaction->getOperationLength();  //NEW!!!!!!!!
     //std::cout << "lets crash execute\n";
-
     // std::cout<<_nextTransaction->toString()<<std::endl;
+    if(_nextTransaction->getCommand()==0)
+      std::cout<<"111"<<std::endl;
+    else 
+      std::cout<<"333"<<std::endl;
      _nextTransaction->getCommand()->execute();  //NEW!!!!
+     std::cout<<"222"<<std::endl;
     //std::cout << "not crashed\n";
 #ifdef TRANSLIST_ENABLED
     _transactList.push_back(_nextTransaction);

simulators/c++2/src_simulator/arch/ReconfigScheduler.cpp

@@ -41,9 +41,9 @@ Ludovic Apvrille, Renaud Pacalet
 #include <TMLTransaction.h>
 #include <FPGA.h>
 
-ReconfigScheduler::ReconfigScheduler(const std::string& iName, Priority iPrio, const std::string iTaskOrder): WorkloadSource(iPrio), _name(iName), _taskOrder(iTaskOrder), _nextTransaction(0), _tempWorkloadList(0), _indexMark(0){}
+ReconfigScheduler::ReconfigScheduler(const std::string& iName, Priority iPrio, const std::string iTaskOrder): WorkloadSource(iPrio), _name(iName), _taskOrder(iTaskOrder), _nextTransaction(0), _tempWorkloadList(0), _indexMark(0), _reconfigNumber(0){}
 
-ReconfigScheduler::ReconfigScheduler(const std::string& iName, Priority iPrio, WorkloadSource** aSourceArray, unsigned int iNbOfSources, const std::string iTaskOrder): WorkloadSource(iPrio, aSourceArray, iNbOfSources), _name(iName), _taskOrder(iTaskOrder), _nextTransaction(0), _lastSource(0), _tempWorkloadList(0), _indexMark(0) {
+ReconfigScheduler::ReconfigScheduler(const std::string& iName, Priority iPrio, WorkloadSource** aSourceArray, unsigned int iNbOfSources, const std::string iTaskOrder): WorkloadSource(iPrio, aSourceArray, iNbOfSources), _name(iName), _taskOrder(iTaskOrder), _nextTransaction(0), _lastSource(0), _tempWorkloadList(0), _indexMark(0), _reconfigNumber(0) {
 }
 
 TMLTime ReconfigScheduler::schedule(TMLTime iEndSchedule){
@@ -53,8 +53,7 @@ TMLTime ReconfigScheduler::schedule(TMLTime iEndSchedule){
 	TMLTask* aTempTask;
 	TMLTime aTransTimeFuture=-1,aRunnableTime;
 	WorkloadSource *aSourcePast=0, *aSourceFuture=0;  //NEW
-	static unsigned int taskStart=0;
-	static unsigned int reconfigNumber=0;
+      
 	if( _tempWorkloadList.empty()){
 	  for(WorkloadList::iterator i=_workloadList.begin(); i != _workloadList.end(); ++i){
 #ifdef DEBUG_FPGA
@@ -88,7 +87,7 @@ TMLTime ReconfigScheduler::schedule(TMLTime iEndSchedule){
 	}
 	if(_tempWorkloadList.empty()){
 	  _nextTransaction=0;
-	  return reconfigNumber ;
+	  return _reconfigNumber ;
 	}
 
 	for(WorkloadList::iterator i=_tempWorkloadList.begin(); i != _tempWorkloadList.end(); ++i){
@@ -101,28 +100,52 @@ TMLTime ReconfigScheduler::schedule(TMLTime iEndSchedule){
 	  else std::cout<<"temp trans is "<<aTempTrans->toShortString()<<std::endl;
 #endif
 	  if (aTempTrans!=0 && aTempTrans->getVirtualLength()!=0){
+
+	    aRunnableTime=aTempTrans->getRunnableTime();	
+	    if (aRunnableTime<=iEndSchedule){
+	      //Past
+
+	      aMarkerPast=aTempTrans;
+	      aSourcePast=*i; //NEW
+		        
+	    }else{
+	      //Future
+		        
+	      aTransTimeFuture=aRunnableTime;
+	      aMarkerFuture=aTempTrans;
+	      aSourceFuture=*i; //NEW
+		        
+				
+	    }
 #ifdef DEBUG_FPGA
 	    std::cout<<"erase"<<std::endl;
 #endif
-	    _nextTransaction=aTempTrans;
 	    _tempWorkloadList.erase(i);
       
 	    break;
 	  }
 		     
 	}
+	if (aMarkerPast==0){
+	  _nextTransaction=aMarkerFuture;
+	  _lastSource=aSourceFuture; //NEW
+	}else{
+	  _nextTransaction=aMarkerPast;
+	  _lastSource=aSourcePast; //NEW
+	}
+	
 	if(_tempWorkloadList.empty()){
 	  _taskOrder=_taskOrder.substr(_indexMark+1, _taskOrder.length());
 #ifdef DEBUG_FPGA
 	  std::cout<<"_taskOrder is "<<_taskOrder<<std::endl;
 #endif	  
-	  ++reconfigNumber;
+	  ++_reconfigNumber;
 	}
 
 #ifdef DEBUG_FPGA
 	std::cout<<"end order scheduler"<<std::endl;
 #endif
-	return reconfigNumber;
+	return _reconfigNumber;
 	  
 	
      

simulators/c++2/src_simulator/arch/ReconfigScheduler.h

@@ -78,6 +78,7 @@ protected:
 	WorkloadSource* _lastSource;
 	WorkloadList _tempWorkloadList;
 	unsigned int _indexMark;
+	unsigned int _reconfigNumber;
 	
 	
 };

simulators/c++2/src_simulator/definitions.h

@@ -88,6 +88,7 @@ using std::max;
 #undef DEBUG_SERIALIZE
 
 #define DEBUG_FPGA
+#define DEBUG_SIMULATE
 //enables mapping of DIPLODOCUS channels onto buses
 #define BUS_ENABLED
 //cost of a send/wait command