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Commit 7705c134 authored by Daniela Genius's avatar Daniela Genius
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added MPSoC

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/**Copyright or (C) or Copr. Intitut Telecom, Telecom ParisTech,
Ludovic Apvrille, Renaud Pacalet
*
* ludovic.apvrille AT telecom-paristech.fr
*
* This software is a computer program whose purpose is to allow the
* edition of TURTLE analysis, design and deployment diagrams, to
* allow the generation of RT-LOTOS or Java code from this diagram,
* and at last to allow the analysis of formal validation traces
* obtained from external tools, e.g. RTL from LAAS-CNRS and CADP
* from INRIA Rhone-Alpes.
*
* This software is governed by the CeCILL license under French law and
* abiding by the rules of distribution of free software. You can use,
* modify and/ or redistribute the software under the terms of the CeCILL
* license as circulated by CEA, CNRS and INRIA at the following URL
* "http://www.cecill.info".
*
* As a counterpart to the access to the source code and rights to copy,
* modify and redistribute granted by the license, users are provided only
* with a limited warranty and the software's author, the holder of the
* economic rights, and the successive licensors have only limited
* liability.
*
* In this respect, the user's attention is drawn to the risks associated
* with loading, using, modifying and/or developing or reproducing the
* software by the user in light of its specific status of free software,
* that may mean that it is complicated to manipulate, and that also
* therefore means that it is reserved for developers and experienced
* professionals having in-depth computer knowledge. Users are therefore
* encouraged to load and test the software's suitability as regards their
* requirements in conditions enabling the security of their systems and/or
* data to be ensured and, more generally, to use and operate it in the
* same conditions as regards security.
*
* The fact that you are presently reading this means that you have had
* knowledge of the CeCILL license and that you accept its terms.
*
* /**
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UNAME := $(shell uname -s)
CC = /usr/bin/gcc
#CC = test2.sh
#CC = /packages/gcc_3.2.2/bin/g++32
OPT = -O1 -pthread
# Solaris
#LOPT = -O1 -pthread -ldl -lnsl -lsocket
#Linux
LOPT_UNIX = -O1 -pthread -ldl -lrt
LOPT_MAC = -O1 -pthread -ldl
DEBUG = -g
OTHER = -Wall
TRY =
CFLAGS = $(OPT) $(OTHER) $(TRY)
LFLAGS_MAC = $(LOPT_MAC) $(OTHER) $(TRY)
LFLAGS_UNIX = $(LOPT_UNIX) $(OTHER) $(TRY)
# CFLAGS = $(DEBUG) $(OTHER)
OBJDIR = lib
MODULE = run
SRCS_generated_DIR = generated_src/
#SRCS_generated_DIR = generated_src_soclib/
include Makefile.src
#SRCS_base = src_soclib/request.c src_soclib/message.c src_soclib/myerrors.c src_soclib/debug.c src_soclib/syncchannel.c src_soclib/asyncchannel.c src_soclib/request_manager.c src_soclib/random.c src_soclib/mytimelib.c src_soclib/tracemanager.c
SRCS_base = src/request.c src/message.c src/myerrors.c src/debug.c src/syncchannel.c src/asyncchannel.c src/request_manager.c src/random.c src/mytimelib.c src/tracemanager.c
SRCS_base_DIR = .
SRCS_base_DIRSRC = src/
#SRCS_base_DIRSRC = src_soclib/
OBJS_executor = $(SRCS_base:%.c=lib/%.o)
OBJS = $(SRCS:%.c=lib/%.o)
include Makefile.defs
include Makefile.forsoclib
## Variable that points to SystemC installation path
INCDIR = -I. -I$(SRCS_base_DIR) -I$(SRCS_base_DIRSRC) -I$(SRCS_generated_DIR)
LIBDIR = -L. -L..
LIBS = -lm $(EXTRA_LIBS)
EXE = $(MODULE).x
.SUFFIXES: .c .o .x
$(EXE): makedir $(OBJS) $(OBJS_executor)
ifeq ($(UNAME),Darwin)
$(CC) $(LFLAGS_MAC) $(INCDIR) $(LIBDIR) -o $@ $(OBJS) $(OBJS_executor) $(LIBS) 2>&1 | c++filt
endif
ifneq ($(UNAME),Darwin)
$(CC) $(LFLAGS_UNIX) $(INCDIR) $(LIBDIR) -o $@ $(OBJS) $(OBJS_executor) $(LIBS) 2>&1 | c++filt
endif
makedir:
echo Making directories
mkdir -p ./lib
mkdir -p ./lib/$(SRCS_generated_DIR)
mkdir -p ./lib/$(SRCS_base_DIRSRC)
$(OBJDIR)/%.o: $(SRCS_base_DIR)/%.c
$(CC) $(CFLAGS) $(INCDIR) -o $@ -c $<
clean:
rm -f $(OBJS_simulator) $(OBJS_executor) $(OBJS) *~ $(EXE) core
ultraclean: clean
rm -f Makefile.deps
SOCLIB_CPU=ppc
MUTEKH_CPU=ppc
include generated_topcell/procinfo.mk
#SOCLIB_CPU=sparcv8
#MUTEKH_CPU=sparc
#SOCLIB_CPU_COUNT=1
PATH+=/opt/mutekh/bin
export PATH
updateruntime:
cp ~/TURTLE/MPSoC/src/*.c ~/Prog/mutekh/libavatar/
cp ~/TURTLE/MPSoC/src/*.h ~/Prog/mutekh/libavatar/include/
cp ~/TURTLE/MPSoC/src/Makefile ~/Prog/mutekh/libavatar/
updategeneratedcode:
cp ~/TURTLE/MPSoC/generated_src/*.h ~/Prog/mutekh/examples/avatar
cp ~/TURTLE/MPSoC/generated_src/*.c ~/Prog/mutekh/examples/avatar
cp ~/TURTLE/MPSoC/Makefile.soclib ~/Prog/mutekh/examples/avatar/Makefile
compilesoclib:
cp ~/TURTLE/MPSoC/generated_topcell/top.cc ~/Prog/soclib/soclib/platform/topcells/caba-vgmn-mutekh_kernel_tutorial/
cp ~/TURTLE/MPSoC/generated_topcell/deployinfo.h ~/Prog/mutekh/arch/soclib/
cp ~/TURTLE/MPSoC/generated_topcell/deployinfo_map.h ~/Prog/mutekh/arch/soclib/
cat ~/TURTLE/MPSoC/generated_topcell/config_noproc ~/TURTLE/MPSoC/generated_topcell/nbproc > ~/TURTLE/MPSoC/generated_topcell/config
cp ~/TURTLE/MPSoC/generated_topcell/config ~/Prog/mutekh/examples/avatar/
cd ~/Prog/mutekh; make CONF=examples/avatar/config BUILD=soclib-$(MUTEKH_CPU):pf-tutorial
runsoclib:
echo "running soclib"
cd ~/Prog/soclib/soclib/platform/topcells/caba-vgmn-mutekh_kernel_tutorial; make; SOCLIB_GDB=S ./system.x $(SOCLIB_CPU):$(SOCLIB_CPU_COUNT) ~/Prog/mutekh/avatar-soclib-$(MUTEKH_CPU).out
allsoclib: updateruntime updategeneratedcode updateruntimesoclib updategeneratedcodesoclib compilesoclib runsoclib
objs = main.o Block1.o Block0.o
\ No newline at end of file
SRCS = generated_src/main.c generated_src/Block1.c generated_src/Block0.c
\ No newline at end of file
<?xml version="1.0" encoding="UTF-8"?>
<module type="JAVA_MODULE" version="4">
<component name="NewModuleRootManager" inherit-compiler-output="true">
<exclude-output />
<content url="file://$MODULE_DIR$">
<sourceFolder url="file://$MODULE_DIR$/example" isTestSource="false" />
</content>
<orderEntry type="inheritedJdk" />
<orderEntry type="sourceFolder" forTests="false" />
</component>
</module>
\ No newline at end of file
#0 time=0.003190630 block=Block1 type=state_entering state=__StartState
#1 time=0.003302655 block=Block1 type=state_entering state=state0
#2 time=0.003343306 block=Block0 type=state_entering state=__StartState
#3 time=0.003437728 block=Block0 type=state_entering state=state0
#4 time=0.003617095 block=Block0 type=send_async channel=val msgid=0 params=
#5 time=0.003656192 block=Block0 type=send_async_2 channel=val
#6 time=0.004016915 block=Block1 type=receive_async channel=val msgid=0 params=
#7 time=0.004066638 block=Block1 type=receive_async_2 channel=val
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