new device numbering for flat/clustered

MPSoC/mutekh/arch/soclib/ldscript.cpp

@@ -73,12 +73,7 @@ MEMORY
     mem_rom (RXAL): ORIGIN = CONFIG_ROM_ADDR, LENGTH = CONFIG_ROM_SIZE
 #endif
     mem_ram (RWAL): ORIGIN = CONFIG_RAM_ADDR, LENGTH = CONFIG_RAM_SIZE
-//ajoute DG provisiore
-//mwmr_ram (RWAL): ORIGIN = 0xA0200000, LENGTH = 0x00001000
-//mwmrd_ram (RWAL): ORIGIN = 0xB0200000, LENGTH = 0x00003000
-//19.05. une seule RAMLOCKS en cas de besoin (actually unused)
-vci_locks (RWAL): ORIGIN = 0xC0200000, LENGTH = 0x100
-//ajoute DG
+
 #if defined(DEPLOY_RAM0_NAME)
     DEPLOY_RAM0_NAME (RWAL): ORIGIN = DEPLOY_RAM0_ADDR, LENGTH = DEPLOY_RAM0_SIZE
 #endif

src/main/java/ddtranslatorSoclib/toTopCell/Declaration.java

@@ -198,9 +198,9 @@ public class Declaration
 
 	//No DMA yet; planned to make it optional depending on deployment diagram
 		if (nb_clusters == 0)
-	    {
-		declaration +=
-		    "caba::VciDma<vci_param> vcidma(\"vci_dma\", maptab,6,6,8);"
+	    {	
+		    //"caba::VciDma<vci_param> vcidma(\"vci_dma\", maptab,6,6,8);"
+		   	declaration += "caba::VciDma<vci_param> vcidma(\"vci_dma\", maptab,cpus.size()+3,6,8);"
 		    + CR;
 	    }
 	else
@@ -495,7 +495,7 @@ public class Declaration
 
 			declaration +=
 			    "soclib::caba::VciVgsb<vci_param> vgsb(\"" +
-			    bus.getBusName () + "\"" + " , maptab," + (3 +
+			    bus.getBusName () + "\"" + " , maptab," + (4 +
 								       TopCellGenerator.
 								       avatardd.getNbCPU()) + "," +
 			    (TopCellGenerator.avatardd.getNbRAM() + TopCellGenerator.avatardd.getNbTTY()
@@ -534,7 +534,7 @@ public class Declaration
 			
 			declaration +=
 			    "soclib::caba::VciVgmn<vci_param> vgmn(\"" +
-			    vgmn.getVgmnName () + "\"" + " , maptab, " + (3 +
+			    vgmn.getVgmnName () + "\"" + " , maptab, " + (4 +
 									  TopCellGenerator.
 									  avatardd.
 									  getNbCPU

src/main/java/ddtranslatorSoclib/toTopCell/NetList.java

@@ -184,7 +184,7 @@ public class NetList
 	    netlist =
 		netlist + "  vcifdtrom.add_property(\"freq\", 1000000);" + CR;
 	    netlist = netlist + "  vcifdtrom.end_node();" + CR2;
-
+            netlist = netlist + "cpus[i]->connect(cpus[i], signal_clk, signal_resetn, signal_vci_m[i]);" + CR2;
 	    netlist = netlist + "// connect cpu" + CR;
 	    //   netlist =netlist + " }"+ CR;
 	  
@@ -294,13 +294,15 @@ public class NetList
 		    netlist =
 			netlist +
 			"  vgmn.p_to_target[3](signal_vci_vcisimhelper);" + CR2;
+		    
 		    netlist =
-			netlist + "  vgmn.p_to_target[4](signal_vci_xicu);" + CR;
+			netlist + "  vgmn.p_to_target[4](signal_vci_vcirttimer);" + CR2;
 		    netlist =
-			netlist + "  vgmn.p_to_target[5](signal_vci_vcirttimer);" +
-			CR2;
+			netlist + "  vgmn.p_to_target[5](signal_vci_xicu);" + CR;
 		    netlist =
-			netlist + "  vgmn.p_to_target[6](signal_vci_vcifdtrom);" +
+			netlist + "  vgmn.p_to_target[6](signal_vci_dma);" + CR;
+		    netlist =
+			netlist + "  vgmn.p_to_target[7](signal_vci_vcifdtrom);" +
 			CR2;
 		    netlist =
 			netlist +
@@ -313,6 +315,10 @@ public class NetList
 			netlist +
 			"  vgmn.p_to_initiator[cpus.size()+2](signal_vci_etherneti);"
 			+ CR2;
+		    netlist =
+			netlist +
+			"  vgmn.p_to_initiator[cpus.size()+3](signal_vci_dmai);"
+			+ CR2;
 		}
 	    else
 		{
@@ -597,13 +603,13 @@ public class NetList
 	    }
 
 	//////////////// DMA access
-	//currently short circuited as unused
+
 	netlist = netlist + "vcidma.p_clk(signal_clk);" + CR;
 	netlist = netlist + "vcidma.p_resetn(signal_resetn);" + CR;
 	netlist = netlist + "vcidma.p_vci_target(signal_vci_dma);" + CR;
-        netlist = netlist + "vcidma.p_vci_initiator(signal_vci_dma);" + CR;
-	netlist = netlist + "vcidma.p_irq(signal_xicu_irq[6]);" + CR;
-	
+        netlist = netlist + "vcidma.p_vci_initiator(signal_vci_dmai);" + CR;
+	netlist = netlist + "vcidma.p_irq(signal_xicu_irq[5]);" + CR;
+	//	netlist = netlist + "vgmn.p_to_initiator[cpus.size()+3](signal_vci_dmai);;" + CR;
 	//////////////// fdrom
 
 	netlist = netlist + "{" + CR2;

src/main/java/ddtranslatorSoclib/toTopCell/Signal.java

@@ -105,6 +105,7 @@ public class Signal {
 	signal = signal +" caba::VciSignals<vci_param> signal_vci_vcisimhelper(\"signal_vci_vcisimhelper\");"+ CR;
 	signal = signal +"caba::VciSignals<vci_param> signal_vci_vcirttimer(\"signal_vci_vcirttimer\");"+ CR;
 	signal = signal +"caba::VciSignals<vci_param> signal_vci_dma(\"signal_vci_dma\");"+ CR;
+		signal = signal +"caba::VciSignals<vci_param> signal_vci_dmai(\"signal_vci_dmai\");"+ CR;
 	//signal = signal +"caba::VciSignals<vci_param> signal_vci_mwmr_ram(\"signal_vci_mwmr_ram\");"+ CR;
 	//signal = signal +"caba::VciSignals<vci_param> signal_vci_mwmrd_ram(\"signal_vci_mwmrd_ram\");"+ CR;
 	signal = signal +"caba::VciSignals<vci_param> signal_vci_vcifdaccessi;"+ CR;