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Commit b47e18a8 authored by Ludovic Apvrille's avatar Ludovic Apvrille
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Adding new figures for tutorial

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...@@ -390,3 +390,66 @@ ...@@ -390,3 +390,66 @@
\newlabel{fig:sampleArch}{{118}{93}{Simple secured message exchange architecture}{figure.1.118}{}} \newlabel{fig:sampleArch}{{118}{93}{Simple secured message exchange architecture}{figure.1.118}{}}
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\citation{Apvrille06,Apvrille08}
\citation{Knorreck11}
\citation{EnriciThesis}
\citation{Jaber2011}
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\bibcite{Schmidt}{1}
\bibcite{TToolWebSite}{2}
\bibcite{Knorreck09}{3}
\bibcite{Knorreck11}{4}
\bibcite{YChart}{5}
\bibcite{ZigBee}{6}
\bibcite{Apvrille06}{7}
\bibcite{Apvrille08}{8}
\bibcite{Waseem06}{9}
\bibcite{Jaber2011}{10}
\bibcite{Koteng06}{11}
\bibcite{Zimmermann80}{12}
\bibcite{Ousterhout96}{13}
\bibcite{Dabek02}{14}
\bibcite{Lee06}{15}
\bibcite{Gonzalez13}{16}
\bibcite{Embb}{17}
\bibcite{EnriciThesis}{18}
\bibcite{SystemCSimulationSemantics}{19}
\bibcite{gtkwave}{20}
\bibcite{Graphviz}{21}
\bibcite{CADP}{22}
\bibcite{UPPAAL}{23}
\bibcite{LOTOS}{24}
\bibcite{Latre06}{25}
\bibcite{Waseem09}{26}
\bibcite{Zedboard}{27}
\bibcite{BlanchetJCS08}{28}
\gdef \@abspage@last{105}
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\contentsline {title}{A Tutorial on TTool/DIPLODOCUS: an Open-source Toolkit for the Design of Data-flow Embedded Systems}{1}{chapter.1}%
\authcount {4}
\contentsline {author}{Andrea Enrici\unskip {} \and Letitia Li\unskip {} \and Ludovic Apvrille\unskip {} \and Dominique Blouin\unskip {}}{1}{chapter.1}%
\contentsline {section}{\numberline {1}Important note}{3}{section.1.1}%
\contentsline {section}{\numberline {2}Why TTool/DIPLODOCUS?}{4}{section.1.2}%
\contentsline {section}{\numberline {3}An overview of TTool/DIPLODOCUS}{4}{section.1.3}%
\contentsline {section}{\numberline {4}The software architecture of TTool/DIPLODOCUS}{6}{section.1.4}%
\contentsline {section}{\numberline {5}Configuring TTool/DIPLODOCUS}{6}{section.1.5}%
\contentsline {section}{\numberline {6}Starting a new project}{10}{section.1.6}%
\contentsline {section}{\numberline {7}Modeling a ZigBee transmitter}{15}{section.1.7}%
\contentsline {subsection}{\numberline {7.1}The functionality of a ZigBee transmitter (data-link layer)}{15}{subsection.1.7.1}%
\contentsline {subsection}{\numberline {7.2}Creating the application model of a ZigBee transmitter (data-link layer)}{16}{subsection.1.7.2}%
\contentsline {subsubsection}{Attributes of a primitive component}{19}{section*.3}%
\contentsline {subsubsection}{Ports, channels, events and requests}{19}{section*.4}%
\contentsline {subsubsection}{The activity diagram of a primitive component}{22}{section*.5}%
\contentsline {subsection}{\numberline {7.3}Platform modeling}{32}{subsection.1.7.3}%
\contentsline {subsection}{\numberline {7.4}Creating the platform model of EMBB}{32}{subsection.1.7.4}%
\contentsline {subsection}{\numberline {7.5}Communication protocols and patterns modeling}{40}{subsection.1.7.5}%
\contentsline {subsection}{\numberline {7.6}Modeling a DMA data transfer with Communication Patterns}{41}{subsection.1.7.6}%
\contentsline {subsection}{\numberline {7.7}Communication models}{43}{subsection.1.7.7}%
\contentsline {subsubsection}{The communication mismatch in EMBB}{45}{section*.6}%
\contentsline {subsubsection}{Creating Communication Pattern diagrams}{50}{section*.7}%
\contentsline {subsection}{\numberline {7.8}Mapping}{53}{subsection.1.7.8}%
\contentsline {section}{\numberline {8}Design Space Exploration in TTool/DIPLODOCUS}{66}{section.1.8}%
\contentsline {subsection}{\numberline {8.1}Simulation}{66}{subsection.1.8.1}%
\contentsline {subsubsection}{The simulation results of the ZigBee transmitter (physical layer)}{72}{section*.8}%
\contentsline {subsection}{\numberline {8.2}Formal verification}{77}{subsection.1.8.2}%
\contentsline {subsubsection}{Formal Verification before mapping}{77}{section*.9}%
\contentsline {subsubsection}{Pre-mapping formal verification with UPPAAL}{79}{section*.10}%
\contentsline {subsubsection}{Post-mapping formal Verification with the TTool verifier and simulator engine}{79}{section*.11}%
\contentsline {subsubsection}{Example of post-mapping formal verification}{80}{section*.12}%
\contentsline {subsubsection}{Post-mapping formal verification with ProVerif}{83}{section*.13}%
\contentsline {section}{\numberline {9}Automatic Code Generation for Rapid Protoyping}{86}{section.1.9}%
\contentsline {subsubsection}{The compilation process}{86}{section*.14}%
\contentsline {subsubsection}{Scheduling of operations}{87}{section*.15}%
\contentsline {subsubsection}{Memory allocation}{87}{section*.16}%
\contentsline {subsubsection}{Portability of the code-generation approach}{87}{section*.17}%
\contentsline {subsection}{\numberline {9.1}Generating the code for the ZigBee transmitter}{88}{subsection.1.9.1}%
\contentsline {section}{\numberline {10}Analysis of security properties}{93}{section.1.10}%
\contentsline {subsection}{\numberline {10.1}Symmetric Encryption}{93}{subsection.1.10.1}%
\contentsline {subsection}{\numberline {10.2}Nonces}{94}{subsection.1.10.2}%
\contentsline {subsection}{\numberline {10.3}Key exchange}{94}{subsection.1.10.3}%
\contentsline {subsection}{\numberline {10.4}MAC}{95}{subsection.1.10.4}%
\contentsline {subsection}{\numberline {10.5}Automated Security Generation}{95}{subsection.1.10.5}%
\contentsline {section}{\numberline {11}Conclusion}{98}{section.1.11}%
\contentsline {section}{\numberline {1.A}Formal description of Communication Patterns}{99}{section.a.1.A}%
\contentsline {section}{\numberline {1.B}TTool/DIPLODOCUS' simulation semantics}{102}{section.a.1.B}%
\contentsline {subsection}{\numberline {1.B.1}Functionality}{102}{subsection.a.1.B.1}%
\contentsline {subsection}{\numberline {1.B.2}Platform}{102}{subsection.a.1.B.2}%
\contentsline {subsection}{\numberline {1.B.3}Mapping}{103}{subsection.a.1.B.3}%
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