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Commit bd354f3c authored by Ludovic Apvrille's avatar Ludovic Apvrille
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Update on tracemanager

parent a7686c86
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objs = main.o B2.o B0.o B1.o objs = main.o InterfaceDevice.o SmartCard.o TCPIP.o TCPPacketManager.o Application.o SmartCardController.o
\ No newline at end of file \ No newline at end of file
SRCS = generated_src/main.c generated_src/B2.c generated_src/B0.c generated_src/B1.c SRCS = generated_src/main.c generated_src/InterfaceDevice.c generated_src/SmartCard.c generated_src/TCPIP.c generated_src/TCPPacketManager.c generated_src/Application.c generated_src/SmartCardController.c
\ No newline at end of file \ No newline at end of file
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...@@ -3,5 +3,34 @@ ...@@ -3,5 +3,34 @@
extern pthread_mutex_t __mainMutex; extern pthread_mutex_t __mainMutex;
/* Synchronous channels */ /* Synchronous channels */
extern syncchannel __B_sendReq__B2_receiveReq; extern syncchannel __TCPIP_timeoutPacket__TCPPacketManager_timeoutPacket;
extern syncchannel __TCPIP_emptyListOfPackets__TCPPacketManager_empty;
extern syncchannel __TCPIP_addPacket__TCPPacketManager_addPacket;
extern syncchannel __TCPIP_ackPacket__TCPPacketManager_ackPacket;
extern syncchannel __Application_open__TCPIP_open;
extern syncchannel __Application_close__TCPIP_close;
extern syncchannel __Application_abort__TCPIP_abort;
extern syncchannel __Application_sendTCP__TCPIP_send_TCP;
extern syncchannel __SmartCardController_fromTtoP__TCPIP_fromTtoP;
extern syncchannel __SmartCardController_fromPtoT__TCPIP_fromPtoT;
extern syncchannel __SmartCardController_start_TCPIP__TCPIP_start;
extern syncchannel __SmartCardController_reset__InterfaceDevice_reset;
extern syncchannel __SmartCardController_pTS__InterfaceDevice_pTS;
extern syncchannel __SmartCardController_dataReady__InterfaceDevice_data_Ready;
extern syncchannel __SmartCardController_activation__InterfaceDevice_activation;
extern syncchannel __SmartCardController_fromDtoSC__InterfaceDevice_fromDtoSC;
extern syncchannel __SmartCardController_answerToReset__InterfaceDevice_answerToReset;
extern syncchannel __SmartCardController_pTSCConfirm__InterfaceDevice_pTSConfirm;
extern syncchannel __SmartCardController_fromSCtoD__InterfaceDevice_fromSCtoD;
extern syncchannel __SmartCardController_data_Ready_SC__InterfaceDevice_dataReady;
extern syncchannel __SmartCardController_start_Application__Application_startApplication;
extern syncchannel __TCPIP_set__mainTimer__Timer__mainTimer__TCPIP_set;
extern syncchannel __TCPIP_reset__mainTimer__Timer__mainTimer__TCPIP_reset;
extern syncchannel __TCPIP_expire__mainTimer__Timer__mainTimer__TCPIP_expire;
extern syncchannel __TCPPacketManager_set__timerP__Timer__timerP__TCPPacketManager_set;
extern syncchannel __TCPPacketManager_reset__timerP__Timer__timerP__TCPPacketManager_reset;
extern syncchannel __TCPPacketManager_expire__timerP__Timer__timerP__TCPPacketManager_expire;
/* Asynchronous channels */
extern asyncchannel __TCPIP_receiveTCP__Application_receiveTCP;
extern asyncchannel __TCPPacketManager_storePacket__TCPPacketManager_retrieve;
#endif #endif
#define CACHED_RAM0_NAME cram0 #define CACHED_RAM0_NAME cram0
#define CACHED_RAM0_ADDR 0x10000000 #define CACHED_RAM0_ADDR 0x10000000
#define CACHED_RAM0_SIZE 0x800 #define CACHED_RAM0_SIZE 0x80000
#define DEPLOY_RAM0_NAME uram0 #define DEPLOY_RAM0_NAME uram0
#define DEPLOY_RAM0_ADDR 0x10200800 #define DEPLOY_RAM0_ADDR 0x10280000
#define DEPLOY_RAM0_SIZE 0x800 #define DEPLOY_RAM0_SIZE 0x80000
...@@ -3,8 +3,56 @@ ...@@ -3,8 +3,56 @@
.channel0 : { \ .channel0 : { \
*(section_channel0)\ *(section_channel0)\
} > uram0\
.channel1 : { \
*(section_channel1)\
} > uram0\
.channel2 : { \
*(section_channel2)\
} > uram0\
.channel3 : { \
*(section_channel3)\
} > uram0\
.channel4 : { \
*(section_channel4)\
} > uram0\
.channel5 : { \
*(section_channel5)\
} > uram0\
.channel6 : { \
*(section_channel6)\
} > uram0\ } > uram0\
.lock0 : { \ .lock0 : { \
*(section_lock0)\ *(section_lock0)\
} > uram0\ } > uram0\
.lock1 : { \
*(section_lock1)\
} > uram0\
.lock2 : { \
*(section_lock2)\
} > uram0\
.lock3 : { \
*(section_lock3)\
} > uram0\
.lock4 : { \
*(section_lock4)\
} > uram0\
.lock5 : { \
*(section_lock5)\
} > uram0\
.lock6 : { \
*(section_lock6)\
} > uram0\
#ifndef TRACEMANAGER_H #ifndef TRACEMANAGER_H
#define TRACEMANANER_H #define TRACEMANAGER_H
#include "request.h" #include "request.h"
......
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