Commits · 0718a3875d8d0dc3e6b9aea1073803427827b2bc · mbe-tools / TTool

Jul 17, 2019
- Revert "Merge branch 'explo' into 'master'" · 0718a387
  Ludovic Apvrille authored 5 years ago
  
  This reverts merge request !200
  0718a387
- fpga and html · f8bd708a
  Siyuan Niu authored 5 years ago
  
  f8bd708a
- fpga explo and html · 8be7954c
  Siyuan Niu authored 5 years ago
  
  8be7954c
- Revert "Merge branch 'exploration' into 'master'" · d2faa163
  Ludovic Apvrille authored 5 years ago
  
  This reverts merge request !195
  d2faa163
Jul 16, 2019
- new html change and fpga explo · b51f278b
  Siyuan Niu authored 5 years ago
  
  b51f278b
Jul 10, 2019
- reconfig time html almost ok · aaecbbf2
  Siyuan Niu authored 5 years ago
  
  aaecbbf2
Jul 08, 2019
- simulation trace change · 5591bd6a
  Siyuan Niu authored 5 years ago
  
  5591bd6a
Jul 05, 2019
- bug not sovled · 0d6b30ac
  Siyuan Niu authored 5 years ago
  
  0d6b30ac
- Resolving bug on routers translation · b22d903d
  Ludovic Apvrille authored 5 years ago
  
  b22d903d
- multicore explo ok · 11683585
  Siyuan Niu authored 5 years ago
  
  11683585
Jul 03, 2019
- html ok update · 2ae5b627
  Siyuan Niu authored 5 years ago
  
  2ae5b627
- Adding support for params in diplo simulation · 3938c0f0
  Ludovic Apvrille authored 5 years ago
  
  3938c0f0
- fpga explo ok but bug not ok · e65dfdeb
  Siyuan Niu authored 5 years ago
  
  e65dfdeb
- Update on simulator · f399b039
  Ludovic Apvrille authored 5 years ago
  
  f399b039
Jul 02, 2019
- html ok./run.x -ohtml 1.html · 6212d18b
  Siyuan Niu authored 5 years ago
  
  6212d18b
Jun 28, 2019
- update for conflict · 320bf73f
  Maysam Zoor authored 5 years ago
  
  320bf73f
- html ok · b368d7c9
  Siyuan Niu authored 5 years ago
  
  b368d7c9
- Adding save into xml functionality · 08394c2c
  Maysam Zoor authored 5 years ago
  
  08394c2c
Jun 27, 2019
- pie chart almost ok · 2eb08f35
  Siyuan Niu authored 5 years ago
  
  2eb08f35
- html ok · 5adf4d4d
  Siyuan Niu authored 5 years ago
  
  5adf4d4d
Jun 25, 2019
- html hw · 67e594aa
  Siyuan Niu authored 5 years ago
  
  67e594aa
Jun 24, 2019
- Adding simple sdf model for testing FPGAs · 8f8081c9
  apvrille authored 5 years ago
  
  8f8081c9
Jun 17, 2019
- button ok · 24a0fe86
  Siyuan Niu authored 5 years ago
  
  24a0fe86
- button almost ok · d8bdba26
  Siyuan Niu authored 5 years ago
  
  d8bdba26
Jun 14, 2019
- Slight update on simulator · 58168102
  apvrille authored 5 years ago
  
  58168102
- pie chart using chartjs ok · c879208d
  Siyuan Niu authored 5 years ago
  
  c879208d
- pie chart using chartjs · 75972ad0
  Siyuan Niu authored 5 years ago
  
  75972ad0
Jun 13, 2019
- one pie chart ok without color · d8daaf97
  Siyuan Niu authored 5 years ago
  
  d8daaf97
Jun 07, 2019
- Update on simulation traces · 6fea1fe5
  Ludovic Apvrille authored 5 years ago
  
  6fea1fe5
- Removing useless cout in diplo simulator · a4dcb3db
  Ludovic Apvrille authored 5 years ago
  
  a4dcb3db
Jun 06, 2019
- Adding params of events in txt and html traces · fefe4fb3
  apvrille authored 5 years ago
  
  fefe4fb3
Jun 05, 2019
- 2fpgas communication ok · 61fc350d
  Siyuan Niu authored 5 years ago
  
  61fc350d
Jun 04, 2019
- txt for one fpga ok · cfde9125
  Siyuan Niu authored 5 years ago
  
  cfde9125
- css ok and delete commits · 9619fbeb
  Siyuan Niu authored 5 years ago
  
  9619fbeb
Jun 03, 2019
- First complete simulation · c3b3f751
  apvrille authored 5 years ago
  
  c3b3f751
- Simulation of tonetwork: ok · 5d44159e
  apvrille authored 5 years ago
  
  5d44159e
- Update on simulator debug and task bug in tonetwork · ea19b491
  Ludovic Apvrille authored 5 years ago
  
  ea19b491
May 21, 2019
- vcd ok · 47a31dc5
  Siyuan Niu authored 5 years ago
  
  47a31dc5
- html file ok execpt the name · 7ebbc50b
  Siyuan Niu authored 5 years ago
  
  7ebbc50b
- pie chart location ok · 046be899
  Siyuan Niu authored 5 years ago
  
  046be899