Bactrackig of verification results --> scenario simulation
Hi,
How to trace back when a property (pragma) is not satisfied? Today: the question is answered in the form of a graph. Problem: how to relate the graph to the state machines of the SysML model? My proposal: generate a simulation scenario in order to simulate the states machines and show the way to a state where the property is not satisfied.
Thanks in anticipation
Pierre de Saqui-Sannes, ISAE-SUPAERO, Toulouse, France
Submitted by external user pdss@isae-supaero.fr