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Title
html is ok
!137
· created
Apr 03, 2019
by
Siyuan Niu
Merged
0
updated
Apr 03, 2019
html ok
!130
· created
Apr 03, 2019
by
Siyuan Niu
Closed
0
updated
Apr 03, 2019
html output change and fpga explo
!203
· created
Jul 19, 2019
by
Siyuan Niu
Closed
0
updated
Jul 19, 2019
Htmll
!192
· created
Jun 28, 2019
by
Siyuan Niu
Merged
0
updated
Jun 28, 2019
Implementing support for owner in state-machine element mutations and adding feedback to AMULET AI module
!465
· created
Jun 28, 2023
by
Bastien Sultan
Merged
0
updated
Jun 28, 2023
Improving AIMULET and adding a test on AvatarSpecification cloning
!469
· created
Aug 03, 2023
by
Bastien Sultan
Merged
0
updated
Aug 03, 2023
Improving AImulet module
!470
· created
Aug 30, 2023
by
Bastien Sultan
Merged
0
updated
Aug 30, 2023
Improving W-Sec tutorial
!435
· created
Jul 29, 2022
by
Bastien Sultan
Merged
Approved
0
updated
Jul 29, 2022
Improving W-Sec tutorial
!434
· created
Jul 29, 2022
by
Bastien Sultan
Closed
0
updated
Jul 29, 2022
inhibiting parser output messages on stderr and stdout
!463
· created
Jun 20, 2023
by
Sophie Coudert
Closed
0
updated
Jun 20, 2023
IntBoolSolver (IBS) version 1.0 completed
!457
· created
May 30, 2023
by
Sophie Coudert
Merged
0
updated
Jun 02, 2023
Invisible Architecture Element Fix
!37
· created
Feb 02, 2018
by
Letitia Li
Merged
0
updated
Feb 02, 2018
Irina
!51
· created
May 14, 2018
by
Daniela Genius
Merged
0
updated
May 14, 2018
Issue #196 CP (Communication Pattern) not updated when renaming HW nodes
!362
· created
Nov 10, 2020
by
Le Van Truong
Merged
0
updated
Nov 10, 2020
Issue #196 CP (Communication Pattern) not updated when renaming HW nodes
!361
· created
Nov 09, 2020
by
Le Van Truong
Closed
0
updated
Nov 09, 2020
Issue #251 Adding a getAllTransactionsOfTask <String taskName>
!302
· created
Feb 27, 2020
by
Le Van Truong
Closed
0
updated
Feb 27, 2020
Issue #255 Bug on daemon task: the simulation should last much longer
!322
· created
Mar 19, 2020
by
Le Van Truong
Merged
0
updated
Mar 19, 2020
Issue #288 Cross-CPU scheduling
!393
· created
Feb 03, 2021
by
Le Van Truong
Merged
0
updated
Feb 04, 2021
Issue #306: add clock divider value to FPGA
!410
· created
Apr 12, 2021
by
Le Van Truong
Merged
Approved
0
updated
Apr 13, 2021
Issue #313: Add option to display the trace in a selected duration
!421
· created
Jul 02, 2021
by
Le Van Truong
Merged
0
updated
Jul 15, 2021
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