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A simple example design for Zynq-based boards. VHDL design of custom HW mapped in Programmable Logic, Linux - Busybox - Buildroot SW stack, user SW applications interacting with custom hardware, Linux drivers, SW and HW debugging.

Fork from https://gitlab.inf.telecom-sudparis.eu/infra-web/hotcrp-docker.git

RAMSES (Refinement of AADL Models for Synthesis of Embedded Systems) is a model transformation and code generation tool that produces C code for ARINC653-compliant operating systems and OSEK-compliant operating systems.

SAR Image Despeckling by Deep Neural Networks: from a pre-trained model to an end-to-end training strategy - Notebook implementation usable on Google Colaboratory

API pour communication avec carte Mifare DESFire EV1

HASOR (Handheld Acquisition System Open RTI) is an open-hardware platform to perform Reflectance Transformation Imaging on small objects.

Multi-temporal speckle reduction with self-supervised deep neural networks

Python implementation of the GLRT based linear features detector proposed by N.Gasnier, L.Denis, and F.Tupin in Generalized Likelihood Ratio Tests for Linear Structure Detection in SAR Images (EUSAR 2021).