Explore projects
-
Renaud Pacalet / sab4z
CeCILL Free Software License Agreement v2.1A simple example design for Zynq-based boards. VHDL design of custom HW mapped in Programmable Logic, Linux - Busybox - Buildroot SW stack, user SW applications interacting with custom hardware, Linux drivers, SW and HW debugging.
Updated -
Renaud Pacalet / secbus
CeCILL Free Software License Agreement v2.1A hardware / software architecture protecting the external memories of an SoC
Updated -
Updated
-
-
Updated