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A simple example design for Zynq-based boards. VHDL design of custom HW mapped in Programmable Logic, Linux - Busybox - Buildroot SW stack, user SW applications interacting with custom hardware, Linux drivers, SW and HW debugging.

This is a project of OPC UA specification Part 14 PubSub implementation.

The project include 2 major parts : OPC UA server with opc ua pubsub kit and OPC UA MQTT Configuration tool .

Compagnon repository of the paper 'Invariance-based semi-supervised representation learning for sound event detection'.

A hardware / software architecture protecting the external memories of an SoC