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Commit d6366e9e authored by Siyuan Niu's avatar Siyuan Niu
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task division ok html no

parent 0a19b9f2
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1 merge request!128Simulation siyuan2
...@@ -60,7 +60,7 @@ MultiCoreCPU::MultiCoreCPU(ID iID, ...@@ -60,7 +60,7 @@ MultiCoreCPU::MultiCoreCPU(ID iID,
unsigned int iChangeIdleModeCycles, unsigned int iChangeIdleModeCycles,
unsigned int iCyclesBeforeIdle, unsigned int iCyclesBeforeIdle,
unsigned int ibyteDataSize, unsigned int ibyteDataSize,
unsigned int iAmountOfCore): CPU(iID, iName, iScheduler, iAmountOfCore), /*_lastTransaction(0),*/ _masterNextTransaction(0), _timePerCycle(iTimePerCycle) unsigned int iAmountOfCore): CPU(iID, iName, iScheduler, iAmountOfCore), /*_lastTransaction(0),*/ _masterNextTransaction(0), _timePerCycle(iTimePerCycle), coreNumber(0)
#ifdef PENALTIES_ENABLED #ifdef PENALTIES_ENABLED
, _pipelineSize(iPipelineSize), _taskSwitchingCycles(iTaskSwitchingCycles),_brachingMissrate(iBranchingMissrate) , _pipelineSize(iPipelineSize), _taskSwitchingCycles(iTaskSwitchingCycles),_brachingMissrate(iBranchingMissrate)
, _changeIdleModeCycles(iChangeIdleModeCycles), _cyclesBeforeIdle(iCyclesBeforeIdle) , _changeIdleModeCycles(iChangeIdleModeCycles), _cyclesBeforeIdle(iCyclesBeforeIdle)
...@@ -95,7 +95,7 @@ void MultiCoreCPU::initCore(){ ...@@ -95,7 +95,7 @@ void MultiCoreCPU::initCore(){
multiCore[i] = 0; multiCore[i] = 0;
} }
unsigned int MultiCoreCPU::getCoreNumber(){ /*unsigned int MultiCoreCPU::getCoreNumber(){
unsigned int i; unsigned int i;
for( i = 0; i < amountOfCore; i++){ for( i = 0; i < amountOfCore; i++){
if(multiCore[i] == 0){ if(multiCore[i] == 0){
...@@ -104,13 +104,15 @@ unsigned int MultiCoreCPU::getCoreNumber(){ ...@@ -104,13 +104,15 @@ unsigned int MultiCoreCPU::getCoreNumber(){
} }
} }
return i; return i;
} }*/
TMLTime MultiCoreCPU::getMinEndSchedule(){ TMLTime MultiCoreCPU::getMinEndSchedule(){
TMLTime minTime=multiCore[0]; TMLTime minTime=multiCore[0];
for( TMLTime i = 1; i < multiCore.size(); i++){ for( TMLTime i = 1; i < multiCore.size(); i++){
if( minTime > multiCore[i]) if( minTime > multiCore[i]){
minTime=multiCore[i]; minTime=multiCore[i];
coreNumber=i;
}
} }
return minTime; return minTime;
} }
...@@ -327,16 +329,20 @@ bool MultiCoreCPU::addTransaction(TMLTransaction* iTransToBeAdded){ ...@@ -327,16 +329,20 @@ bool MultiCoreCPU::addTransaction(TMLTransaction* iTransToBeAdded){
std::cout << "CPU:addt: to be started" << std::endl; std::cout << "CPU:addt: to be started" << std::endl;
_endSchedule=_nextTransaction->getEndTime(); _endSchedule=_nextTransaction->getEndTime();
////test/// ////test///
unsigned int iCoreNumber=getCoreNumber(); // unsigned int iCoreNumber=getCoreNumber();
multiCore[iCoreNumber]=_endSchedule; unsigned static time=0;
if (iCoreNumber != (amountOfCore -1)){ multiCore[coreNumber]=_endSchedule;
if (time < amountOfCore -1){
_endSchedule=0; _endSchedule=0;
_nextTransaction->setTransactCoreNumber(coreNumber);
++coreNumber;
} }
else { else {
_endSchedule=getMinEndSchedule(); _endSchedule=getMinEndSchedule();
initCore(); _nextTransaction->setTransactCoreNumber(coreNumber);
//initCore();
} }
_nextTransaction->setTransactCoreNumber(iCoreNumber); time++;
std::cout <<"test transaction core number !!!! "<<_nextTransaction->getTransactCoreNumber()<<std::endl; std::cout <<"test transaction core number !!!! "<<_nextTransaction->getTransactCoreNumber()<<std::endl;
std::cout << "set end schedule CPU: " << _endSchedule << "\n"; std::cout << "set end schedule CPU: " << _endSchedule << "\n";
_simulatedTime=max(_simulatedTime,_endSchedule); _simulatedTime=max(_simulatedTime,_endSchedule);
......
...@@ -146,9 +146,10 @@ protected: ...@@ -146,9 +146,10 @@ protected:
///1/Processor frequency ///1/Processor frequency
TMLTime _timePerCycle; TMLTime _timePerCycle;
///test//// ///test////
unsigned int coreNumber;
//first parameter is the core number //first parameter is the core number
///second parameter is the end schedule in the core ///second parameter is the end schedule in the core
std::map <unsigned int, int> multiCore; std::map <unsigned int, unsigned int> multiCore;
///initialization of all cores ///initialization of all cores
void initCore(); void initCore();
///get the avaliable core ///get the avaliable core
......
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