Added upper-level module for the memory, also a RT module for separating the RT part from the functional part of the bank

Coming back to a single branch

See merge request florian.brandner/sdram!1

TLA+ : Model works, but income of requests is too heavy, have to model the system to be less charged

Dev: inserted many different concepts. Not optimal, should go inserting things one by one instead of doing all at once

* model DDR banks
* schedule DDR commands using TDM per bank
* model requestors
* check timing outside of models