Explore projects
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Cédric Ware / cours.td-kaya
Creative Commons Attribution-NonCommercial-ShareAlike 2.0 FranceTD équation de Kaya, transition énergétique et développement durable
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sen / stanalysis
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Teralab / AI Experiment Hello World
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Renaud Pacalet / sab4z
CeCILL Free Software License Agreement v2.1A simple example design for Zynq-based boards. VHDL design of custom HW mapped in Programmable Logic, Linux - Busybox - Buildroot SW stack, user SW applications interacting with custom hardware, Linux drivers, SW and HW debugging.
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This is a project of OPC UA specification Part 14 PubSub implementation.
The project include 2 major parts : OPC UA server with opc ua pubsub kit and OPC UA MQTT Configuration tool .
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