Explore projects
-
Updated
-
Updated
-
A simple example design for Zynq-based boards. VHDL design of custom HW mapped in Programmable Logic, Linux - Busybox - Buildroot SW stack, user SW applications interacting with custom hardware, Linux drivers, SW and HW debugging.
Updated -
Updated
-
Updated
-
A hardware / software architecture protecting the external memories of an SoC
Updated -
Updated
-
This is a project of OPC UA specification Part 14 PubSub implementation.
The project include 2 major parts : OPC UA server with opc ua pubsub kit and OPC UA MQTT Configuration tool .
Updated -
Updated
-
Updated
-
RAMSES-2 (Refinement of AADL Models for Synthesis of Embedded Systems) is a model refinement and code generation tool that produces C code for ARINC653, OSEK and POSIX-compliant operating systems. More at https://mem4csd.telecom-paristech.fr/blog/
Updated -
Updated
-
TD équation de Kaya, transition énergétique et développement durable
Updated -
Updated
-
Updated
-
Updated
-
Updated
-
Updated
-