Commits · 4dcbfb26d5fc00ec7109a046feb5bee9059da282 · mbe-tools / TTool

Sep 24, 2020
- fix core dump · 4dcbfb26
  Le Van Truong authored 4 years ago
  
  4dcbfb26
- enhance FPGA reconfig schedule · a62e28f8
  Le Van Truong authored 4 years ago
  
  a62e28f8
Sep 23, 2020
- FPGA reconfigure schedule · e5281e24
  Le Van Truong authored 4 years ago
  
  e5281e24
Sep 01, 2020
- Improve timeline diagram · 50916895
  Le Van Truong authored 4 years ago
  
  50916895
Aug 20, 2020
- fix bug and improve performance of timeline diagram · 507b0ee3
  Le Van Truong authored 4 years ago
  
  507b0ee3
Aug 18, 2020
- fix hanging simulation · f6b3b720
  Le Van Truong authored 4 years ago
  
  f6b3b720
Jul 28, 2020
- add more functions for timeline diagram · 91cd3343
  Le Van Truong authored 4 years ago
  
  91cd3343
Jul 14, 2020
- Send data through socket connection · f6f18e22
  Le Van Truong authored 4 years ago
  
  f6f18e22
Jul 07, 2020
- Display timeline diagram using C++ · d87fab6a
  Le Van Truong authored 4 years ago
  
  d87fab6a
Jun 23, 2020
- Adding README file · 69b1df30
  Ludovic Apvrille authored 4 years ago
  
  69b1df30
- Adding readme · 1819bf37
  Ludovic Apvrille authored 4 years ago
  
  1819bf37
Jun 22, 2020
- display simulation result with timeline diagram · 10958086
  Le Van Truong authored 4 years ago
  
  10958086
Jun 05, 2020
- #262 Server continues to execute in server mode even if socket binding cannot occur · 347c660d
  Le Van Truong authored 4 years ago
  
  347c660d
Jun 03, 2020
- add run until read/write channel access · f87f0b95
  Le Van Truong authored 4 years ago
  
  f87f0b95
May 13, 2020
- Revert "New test added. Changed folder configuration" · 7ecf059d
  Ludovic Apvrille authored 4 years ago
  
  This reverts commit 4af9c8c5.
  7ecf059d
Apr 06, 2020
- modify and add general commands test for TTool · 4d7eaa7a
  Le Van Truong authored 4 years ago
  
  4d7eaa7a
Mar 19, 2020
- Issue #255 Bug on daemon task: the simulation should last much longer · e72b8243
  Le Van Truong authored 4 years ago
  
  e72b8243
Mar 10, 2020
- from Master : Simulator.cpp · e9235920
  Daniela Genius authored 5 years ago
  
  e9235920
- simulator · 4621e7aa
  Daniela Genius authored 5 years ago
  
  4621e7aa
Mar 05, 2020
- adding coding convention · eed61f49
  Le Van Truong authored 5 years ago
  
  eed61f49
- Modify coding convention · a002cf0c
  Le Van Truong authored 5 years ago
  
  a002cf0c
- -updating Latency Detailed analysis and adding compare function for 2 · fe939cc6
  maysam zoor authored 5 years ago
  
  latency detailed analysis
  fe939cc6
Mar 04, 2020
- #250 Emptying simulation transactions during simulation · 5ceb8360
  Le Van Truong authored 5 years ago
  
  5ceb8360
Feb 27, 2020
- Issue #251 Adding a getAllTransactionsOfTask <String taskName> · e2c44680
  Le Van Truong authored 5 years ago
  
  e2c44680
- Updata text color and text overlapping on Enhancing HTML trace · b6be72b5
  Le Van Truong authored 5 years ago
  
  b6be72b5
Feb 26, 2020
- update on enhancing HTML traces · 5c607264
  Le Van Truong authored 5 years ago
  
  5c607264
Feb 25, 2020
- Revert "back up for list all transaction" · 8361cdd0
  Le Van Truong authored 5 years ago
  
  This reverts commit 2183e1ad.
  8361cdd0
- back up for list all transaction · 2183e1ad
  Le Van Truong authored 5 years ago
  
  2183e1ad
Feb 20, 2020
- resolve issue #249 Enhancing HTML traces output by the DIPLODOCUS simulator · ae62da91
  Le Van Truong authored 5 years ago
  
  ae62da91
Jan 20, 2020
- FPGA Reconfiguration · b7a23256
  Le Van Truong authored 5 years ago
  
  b7a23256
Jan 15, 2020
- directory c++bak deleted · d65af927
  Daniela Genius authored 5 years ago
  
  d65af927
Jan 14, 2020
- check txt format before add signal · ca8ab8dd
  Le Van Truong authored 5 years ago
  
  ca8ab8dd
Jan 08, 2020
- add virtual signals by cmd · 8a413237
  Le Van Truong authored 5 years ago
  
  8a413237
Dec 19, 2019
- modify write signal to channel · 99ceab03
  Le Van Truong authored 5 years ago
  
  99ceab03
Dec 17, 2019
- back up FPGA · 57359aea
  Le Van Truong authored 5 years ago
  
  57359aea
- add value to signal · a0f68c11
  Le Van Truong authored 5 years ago
  
  a0f68c11
Dec 13, 2019
- write fake channel · 67df8f0d
  Le Van Truong authored 5 years ago
  
  67df8f0d
Dec 11, 2019
- FPGA reconfiguration base on order of tasks · 1754bc9f
  Le Van Truong authored 5 years ago
  
  1754bc9f
Dec 09, 2019
- Revert "Merge branch 'revert-523cae60 ' into 'master'" · ba605ebc
  Maysam Zoor authored 5 years ago
  
  This reverts merge request !277
  ba605ebc
- Remove duplicate signals on VCD trace · aa1c3a45
  Le Van Truong authored 5 years ago
  
  aa1c3a45