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Example of Verilog/SystemVerilog + SystemC TB simulation using Verilator
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sdram20 / MCsimCoq
MIT LicenseUpdated -
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sdram20 / coqdram
Apache License 2.0Updated -
Renaud Pacalet / sab4u
CeCILL Free Software License Agreement v2.1A simple example design for Zynq Ultrascale+ based boards.
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ring / Geometric_Mean_Denoising
CeCILL Free Software License Agreement v2.0Matlab implementation associated with the article "On the use and denoising of the temporal geometric mean for SAR time series", submitted to IEEE Geoscience and Remote sensing Letters by N.Gasnier, L.Denis and F.Tupin.
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Xuecan Yang / darknet_mnist
MIT LicenseUpdated -
Renaud Pacalet / secbus
CeCILL Free Software License Agreement v2.1A hardware / software architecture protecting the external memories of an SoC
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Cédric Ware / cours.td-kaya
Creative Commons Attribution-NonCommercial-ShareAlike 2.0 FranceTD équation de Kaya, transition énergétique et développement durable
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Renaud Pacalet / ci4teaching
CeCILL Free Software License Agreement v2.1A toy example project showing how GitLab CI can be used for teaching
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16 nibbles (64 bits) parallel sboxes using Xilinx CFGLUT5 primitive
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Renaud Pacalet / mkvhdl
CeCILL Free Software License Agreement v2.1Updated