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A simple example design for Zynq-based boards. VHDL design of custom HW mapped in Programmable Logic, Linux - Busybox - Buildroot SW stack, user SW applications interacting with custom hardware, Linux drivers, SW and HW debugging.

Yet another Makefile for LaTeX

This project contains the ontological framework developed during the MPM4CPS COST Action IC1404 () by working group 1 on foundations for MPM4CPS (http://mpm4cps.eu/).

Python implementation of the narrow rivers extraction framework proposed by N.Gasnier, L.Denis, F.Liège, R.Fjørtoft, and F.Tupin in Narrow River Extraction from SAR ImagesUsing Exogenous Information (https://doi.org/10.1109/JSTARS.2021.3083413).

A hardware / software architecture protecting the external memories of an SoC

This is a project of OPC UA specification Part 14 PubSub implementation.

The project include 2 major parts : OPC UA server with opc ua pubsub kit and OPC UA MQTT Configuration tool .