TTool (pronounced "tea-tool") is a toolkit dedicated to the edition of UML and SysML diagrams, and to the simulation and formal verification (safety, security, performance) of those diagrams.
See ttool.telecom-paris.fr and @TTool_UML_SysML
RAMSES (Refinement of AADL Models for Synthesis of Embedded Systems) is a model transformation and code generation tool that produces C code for ARINC653-compliant operating systems and OSEK-compliant operating systems.
Experiment Specification (ExSpec) is a language to specify the provenance of experiment/simulation data.
ExSpec models are the basis of the Validity Frame Language (VaFL, pronounced "waffle") to specify the validity frames of models.