Explore projects
-
TTool (pronounced "tea-tool") is a toolkit dedicated to the edition of UML and SysML diagrams, and to the simulation and formal verification (safety, security, performance) of those diagrams. See ttool.telecom-paris.fr and @TTool_UML_SysML
Updated -
RAMSES (Refinement of AADL Models for Synthesis of Embedded Systems) is a model transformation and code generation tool that produces C code for ARINC653-compliant operating systems and OSEK-compliant operating systems.
Updated -
Updated
-
-
-
Modèle de présentation Beamer + Modèle de Poster aux couleur de TPT
archived 2Updated -
Modèle pour la génération de supports de cours (poly+slides) au format html, pdf et même docx à partir d'une source unique (au format markdown/pandooc).
Updated -
simple python script to convert Synapses csv schedules to ics calendars.
Updated -
Updated
-
Updated
-
Modified version of QEMU for teaching (M2 SETI Embedded Linux, SE758 Linux Device Drivers...).
Updated -
Updated
-
Experiment Specification (ExSpec) is a language to specify the provenance of experiment/simulation data. ExSpec models are the basis of the Validity Frame Language (VaFL, pronounced "waffle") to specify the validity frames of models.
Updated -
-
Updated
-
Python implementation of the narrow rivers extraction framework proposed by N.Gasnier, L.Denis, F.Liège, R.Fjørtoft, and F.Tupin in Narrow River Extraction from SAR ImagesUsing Exogenous Information (https://doi.org/10.1109/JSTARS.2021.3083413).
Updated -
This repository contains the code in order to reproduce the results presented in "Enriching Wikidata with Semantified Hyperlinks" by Armand Boschin and Thomas Bonald.
Updated -
Updated
-
Updated
-
Updated