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Nouveau thème Beamer aux couleur de Télécom Paris

Example of Verilog/SystemVerilog + SystemC TB simulation using Verilator

Nouveau thème Beamer aux couleur de Télécom Paris

A simple example design for Zynq Ultrascale+ based boards.

Matlab implementation associated with the article "On the use and denoising of the temporal geometric mean for SAR time series", submitted to IEEE Geoscience and Remote sensing Letters by N.Gasnier, L.Denis and F.Tupin.

A hardware / software architecture protecting the external memories of an SoC

Yet another Makefile for LaTeX

Various small projects by Renaud Pacalet

SystemVerilog simulation environment for an UART

TD équation de Kaya, transition énergétique et développement durable